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TNETV2664FIDZWT 数据表(PDF) 79 Page - Texas Instruments |
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TNETV2664FIDZWT 数据表(HTML) 79 Page - Texas Instruments |
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79 / 249 page ![]() TMS320C6424 www.ti.com SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 • Write a ‘1’ to the Boot Complete (BC) bit field in the BOOTCMPLT register to indicate that the host has completed booting this device. Once the bootloader code detects BC = 1, it directs the CPU to begin executing from the DSPBOOTADDR register. The BOOTCMPLT register is reset by any device-level global reset. For the list of device-level global resets, see Section 6.5, Reset. 31 20 19 16 RESERVED ERR R/W-0000 0000 0000 R/W-0000 15 1 0 RESERVED BC R/W- 0000 0000 0000 000 R/W-0 LEGEND: R = Read; W = Write; -n = value after reset Figure 3-3. BOOTCMPLT Register— 0x01C4 000C Table 3-8. BOOTCMPLT Register Description Bit Field Name Description 31:20 RESERVED Reserved. For proper device operation, the user should only write "0" to these bits. Boot Error 0000 = No Error (default). 19:16 ERR 0001 - 1111 = bootloader software detected a boot error and aborted the boot. For the error codes, see the Using the TMS320C642x DSP Bootloader Application Report (literature number SPRAAK5). 15:1 RESERVED Reserved. For proper device operation, the user should only write "0" to these bits. Boot Complete Flag from Host This field is only applicable to Host Boots. 0 BC 0 = Host has not completed booting this device (default). 1 = Host has completed booting this device. DSP can begin executing from the DSPBOOTADDR register value. 3.4.2.3 DSPBOOTADDR Register The DSP Boot Address (DSPBOOTADDR) register contains the starting address for the C64x+ CPU. Whenever the C64x+ is released from reset, it begins executing from the location pointed to by DSPBOOTADDR register. For Host boots (HPI Boot or PCI Boot), the DSPBOOTADDR register is also used for communication between the Host and the bootloader code during boot. The DSPBOOTADDR register is reset by any device-level global reset. For the list of device-level global resets, see Section 6.5, Reset. 31 0 DSPBOOTADDR R/W-0x0010 0000 or 0x4200 00000 LEGEND: R = Read; W = Write; -n = value after reset Figure 3-4. DSPBOOTADDR Register— 0x01C4 0008 Copyright © 2007–2009, Texas Instruments Incorporated Device Configurations 79 Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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