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STLED325 数据表(PDF) 49 Page - STMicroelectronics |
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STLED325 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 62 page ![]() STLED325 Commands Doc ID 17576 Rev 1 49/62 incremented. Upon reaching the last display memory address, the address jumps to 0x10, as it represents the first address location of the display memory. In fixed address mode, the address command has to be sent followed by the display data. When next byte of data is to be written, address command has to be sent again before new display data byte. When the user wants to read the RTC data from the specified memory location of RTC, the user must first set the address of the RTC location using “Address Setting Command” after which send the “Read RTC Register” command. If the address pointer was located in the display memory location and user issues a “Read RTC Register” command without sending the “Address Setting Command”, the RTC data is read from the ad-dress location of the previous value of the RTC address pointer. Thus before reading the RTC register data, the user must set the proper address for RTC using “Address Setting Command”. Prior to writing data to the RTC registers, the address of the RTC must be set using the Address Setting command. Else, if the address pointer happens to be pointing at the LED display memory, then the data will be written to the address location of the previous value in the RTC address pointer. This is vice-versa true for the LED display memory. 7.3.1 Interrupt flags The interrupt is sent on the IRQ_N pin when any one of the event occurs (FP key pressed, RC key pressed or preset value of RTC/guard timer is triggered or activity on WAKE_UP pin or GPIO pins). Simultaneously, the interrupt flags are set. The micro-processor can read the interrupt flags by send-ing the read interrupt flag register command. The following 16-bit data is read by the processor after sending this command. This enables the microprocessor to know what caused the interrupt to occur. If the host sees an interrupt issued from first byte, it is not necessary to read the second byte. Figure 17. Interrupt bit mapping in Byte 1 Byte 1: MSB LSB |
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