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TNETV2685FIDZUT7 数据表(PDF) 39 Page - Texas Instruments

部件名 TNETV2685FIDZUT7
功能描述  Digital Media Processor
PDF  191 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETV2685FIDZUT7 数据表(HTML) 39 Page - Texas Instruments

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TMS320DM647
TMS320DM648
www.ti.com
SPRS372H – MAY 2007 – REVISED APRIL 2012
3.2
Bootmode Registers
The BOOTCFG and DSPBOOTADDR registers are described in the following sections. At reset, the status
levels of various pins required for proper boot are stored within these registers.
3.2.1
Boot Configuration (BOOTCFG) Register
Configuration pins latched at reset are presented in the BOOTCFG register accessible through the system
module. This is a read-only register. The bits show the true latched value of the corresponding input at
RESET or POR deassertion. This is desirable since the most important use of this MMR is for the user to
debug/view the actual value driven on the pins during device reset.
Figure 3-1. BOOTCFG Register
31
24
Reserved
R-0
23
22
21
20
19
18
17
16
AECLKINSEL
PC166
HPIWIDTH
Reserved
FASTBOOT
Reserved
DUHPIEN
EMIFAWIDTH
R-L
R-L
R-L
R-L
15
8
Reserved
R-0
7
4
3
0
Reserved
BOOTMODE
R-0
R-L
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 3-2. BOOTCFG Register Field Descriptions
Bit
Field
Value
Description
31:24
Reserved
Reserved
23
AECLKINSEL
Controls the clock input for EMIFA. Latched from AECLKINSEL at RESET or POR deassertion
1
EMIFA clocked from internal SYSCLK
0
EMIFA clocked from outside from AECLKIN
22
PCI66
Controls PCI speed. PCI. Latched from PCI66 at RESET or POR deassertion
0
33 MHz PCI
1
66 MHz
21
HPIWIDTH
Controls HPI bus width. Latched from HPIWIDTH at RESET or POR deassertion
0
16 bit
1
32 bit
20
Reserved
1
Reserved
19
FASTBOOT
Fast Boot. Latched from FASTBOOT at RESET or POR deassertion
0
No Fast Boot
1
Fast Boot
18
Reserved
Reserved
17
DUHPIEN
PCI Enable Default. Latched from UHPIEN at RESET or POR deassertion
0
UHPI disabled
1
UHPI enabled
16
EMIFAWIDTH
EMIFA CS2 Bus Width Default. Latched from EMIFAWIDTH at RESET or POR deassertion
0
8-bit
1
16-bit
15:4
Reserved
Reserved
Copyright © 2007–2012, Texas Instruments Incorporated
Device Configuration
39
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Product Folder Link(s): TMS320DM647 TMS320DM648



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