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TNETV2685FIDZUT7 数据表(PDF) 55 Page - Texas Instruments |
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TNETV2685FIDZUT7 数据表(HTML) 55 Page - Texas Instruments |
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55 / 191 page  TMS320DM647 TMS320DM648 www.ti.com SPRS372H – MAY 2007 – REVISED APRIL 2012 5.2 Recommended Operating Conditions MIN NOM MAX UNIT CVDD Supply voltage, Core (1) CVDDESS Supply voltage, Ethernet Subsystem Core (1) CVDD1 Supply voltage, DDR Core (1) (-720, -800, -900, - 1.14 1.2 1.26 V 1100 devices) AVDDA Supply voltage, SerDes Analog (1) DVDDD Supply voltage, SerDes Digital (1) AVDDT Supply voltage, SerDes Analog (1) DVDD33 Supply voltage, I/O, 3.3 V 3.14 3.3 3.46 V DVDD18 Supply voltage, DDR I/O, 1.8 V AVDLL1 Supply voltage, I/O, 1.8 V 1.71 1.8 1.89 V AVDLL2 Supply voltage, I/O, 1.8 V AVDDR Supply voltage, 1.8-V SerDes Analog Supply (Regulator) VSS Supply ground (VSS) 0 0 0 V DDR_VREF DDR2 reference voltage(2) 0.49DVDD18 0.5DVDD18 0.51DVDD18 V High-level input voltage, 3.3 V (except PCI-capable and I2C pins) 2 V High-level input voltage, I2C 0.7DVDD33 V VIH PCI-capable pins 0.5DVDD33 DVDD33 + 0.5 V DDR_VREF + DDR2 memory controller pins (DC) DVDD18 + 0.3 V 0.125 Low-level input voltage, 3.3 V(except PCI-capable and I2C pins) 0.8 V Low-level input voltage, I2C 0 0.3DVDD33 V VIL PCI-capable pins -0.5 0.3DVDD33 V DDR2 memory controller pins (DC) -0.3 DDR_VREF - 0.125 V Commercial (3) 0 90 Tcase Operating case temperature Extended(4) -40 105 Industrial -40 90 (-1100 devices)(3) 33.3 1100 MHz (-900 devices) 33.3 900 MHz FSYSCLK1 DSP Operating Frequency (SYSCLK1) (-720 devices) 33.3 720 MHz (-800 devices) 33.3 800 MHz (1) Future variants of TI SOC devices may operate at voltages ranging from 0.9 V to 1.4 V to provide a range of system power/performance options. TI highly recommends that users design-in a supply that can handle multiple voltages within this range (i.e., 1.0 V, 1.05 V, 1.1 V, 1.14 V, 1.2, 1.26 V with ± 3% tolerances) by implementing simple board changes such as reference resistor values or input pin configuration modifications. Not incorporating a flexible supply may limit the system ability to easily adapt to future versions of TI SOC devices. (2) DDR_VREF is expected to equal 0.5DVDDR2 of the transmitting device and to track variations in the DVDD18. (3) To avoid significant device degradation for 1.1GHz devices, the device power-on hours (POH) must be limited to less than 87.6K. (4) To avoid significant device degradation for extended temperature devices (- 40°C ≤ Tcase ≤ 105°C), the device power-on hours (POH) must be limited to less than 50K. Copyright © 2007–2012, Texas Instruments Incorporated Device Operating Conditions 55 Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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