Application information

ST1S50

22/29

DocID025723 Rev 4

An input capacitor connected to VINSW has to be placed as close as possible to the device,

to avoid spikes on VINSW due to the stray inductance and the pulsed input current.

In order to prevent dynamic unbalance between VINSW and VINA, the trace connecting the

VINA pin to the input must be derived from VINSW.

The feedback pin (FB) connected to an external resistor divider is a high impedance node.

The interferences can be minimized by routing the feedback node with a very short trace

and as far away as possible from high current paths

A single point connection from signal ground to power ground is suggested.

Thanks to the exposed pad of the device, the ground plane helps to reduce thermal

resistance junction to ambient; so a large ground plane, soldered to the exposed pad,

enhances the thermal performance of the converter allowing high power conversion.

Figure 11. PCB layout

GNDP

VINSW

VINA

GNDA

FB

SW

BST

PG

EN_SS

COMP

ST1S50PUR

1

2

3

4

5

10

9

8

7

6

COUT

CIN_P

CIN_A

R1

R2

Rc

Cc

Css

CBST

L

Ground plane

GND