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ST1S50 数据表(PDF) 4 Page - STMicroelectronics |
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ST1S50 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 29 page ![]() Pin settings ST1S50 4/29 DocID025723 Rev 4 1 Pin settings 1.1 Pin connection Figure 2. Pin connection (top view) 1.2 Pin description GNDP VINSW VINA GNDA FB SW BST PG EN_SS COMP ST1S50PUR 1 2 3 4 5 10 9 8 7 6 Table 1. Pin description No. Type Description 1 GNDP Power ground. This pin has to be connected to the exposed pad of the device as shown in Figure 11: PCB layout on page 22. 2 VINSW Power input voltage 3 VINA Input voltage 4 GNDA Ground. This pin has to be connected to the exposed pad of the device as shown in Figure 11: PCB layout. 5FB Feedback input. Connecting the output voltage directly to this pin the output voltage is regulated at 0.8 V. To have higher regulated voltages an external resistor divider is required from the VOUT to the FB pin. 6COMP Error amplifier output; the RC network connected to this pin stabilizes the loop. 7EN_SS Enable and soft-start pin: the capacitor connected to this pin programmes the soft-start time. 8 PG Power Good pin 9 BST Bootstrap pin: the capacitor connected between SW and BST allows the proper high-side switch turn on. 10 SW Output switching pin. |
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