L6706 datasheet(17/47 Pages) STMICROELECTRONICS

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L6706

DAC and current reading

Doc ID 15698 Rev 2

17/47

DAC and current reading

L6706 embeds VRD11.x DAC (see Table 7) that allows to regulate the output voltage with a

tolerance of ±0.5% recovering from offsets and manufacturing variations.

The device automatically introduces a -19 mV (both VRD11.x) offset to the regulated

voltage in order to avoid any external offset circuitry to worsen the guaranteed accuracy

and, as a consequence, the calculated system TOB.

Output voltage is programmed through the VID pins: they are inputs of an internal DAC that

is realized by means of a series of resistors providing a partition of the internal voltage

reference. The VID code drives a multiplexer that selects a voltage on a precise point of the

divider. The DAC output is delivered to an amplifier obtaining the voltage reference (i.e. the

set-point of the error amplifier, VREF).

L6706 embeds a flexible, fully-differential current sense circuitry that is able to read across

inductor parasitic resistance or across a sense resistor placed in series to the inductor

element. The fully-differential current reading rejects noise and allows placing sensing

element in different locations without affecting the measurement's accuracy.

Reading current across the inductor DCR, the current flowing trough phase is read using the

voltage drop across the output inductor or across a sense resistor in its series and internally

converted into a current. The trans-conductance ratio is issued by the external resistor Rg

placed outside the chip between CS- pin toward the reading points.

The current sense circuit always tracks the current information, no bias current is sourced

from the CS+ pin: this pin is used as a reference keeping the CS- pin to this voltage. To

correctly reproduce the inductor current an R-C filtering network must be introduced in

parallel to the sensing element.

The current that flows from the CS- pin is then given by the following equation (see

Figure 4):

Where IPHASE is the current carried by the relative phase.

Figure 4.

Current reading connections

Considering now to match the time constant between the inductor and the R-C filter applied

(Time constant mismatches cause the introduction of poles into the current reading network

CS-

DCR

-------------

1s LDCR

()

⁄

⋅

1s R C

⋅⋅

------------------------------------------- I

⋅

PHASE

⋅

CS+

CS-

PHASE

DCR

PHASEx

Inductor DCR Current Sense

ICS-=IINFO

NO Bias

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