System control loop compensation

L6706

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Doc ID 15698 Rev 2

18

System control loop compensation

The control loop is an average current mode control loop (see Figure 5): the output voltage

is equal to the reference programmed by VID minus the droop function terms.

current.

Figure 23.

Main control loop

The control loop gain results (obtained opening the loop after the COMP pin):

Where:

DCR is the Inductor parasitic resistance;

is the equivalent output resistance determined by the droop function;

A (s) is the error amplifier gain;

is the PWM transfer function where

ΔV

and has a typical value of 1.5 V.

Removing the dependence from the error amplifier gain, so assuming this gain high enough,

and with further simplifications, the control loop gain results:

The system control loop gain (see Figure 23) is designed in order to obtain a high DC gain

to minimize static error and to cross the 0dB axes with a constant -20 dB/dec slope with the

L

PWM

ERROR AMPLIFIER

COMP

FB

G

()

PWM Z

() R

DROOP

Z

()

+

()

⋅⋅

Z

() Z

()

+

[]

Z

()

As

()

--------------

1

1

As

()

------------

+

⎝⎠

⎛⎞

R

FB

⋅

+

⋅

-------------------------------------------------------------------------------------------------------------------

–

=

R

DROOP

DCR

Rg

------------- R

FB

⋅

=

PWM

3

5

---

V

IN

ΔV

OSC

-------------------

⋅

=

G

LOOP

s

()

3

5

----

V

IN

ΔV

OSC

----------------------

Z

F

s

()

R

FB

---------------

R

O

R

DROOP

+

R

O

R

L

+

--------------------------------------------

1s C

O

R

DROOP

//R

O

ESR

+

()

⋅⋅

+

s

2

C

O

L

⋅⋅

s

L

R

O

---------

C

O

ESR

⋅

C

O

R

L

⋅

++

1

+

⋅

+

--------------------------------------------------------------------------------------------------------------------------------

⋅⋅

⋅

⋅

–

=