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L6759D 数据表(PDF) 28 Page - STMicroelectronics |
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L6759D 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 51 page ![]() Output voltage monitoring and protection L6759D 28/51 Doc ID 023240 Rev 1 7 Output voltage monitoring and protection The L6759D monitors the regulated voltage of both sections through pin VSEN and SVSEN in order to manage OV and UV. The device shows different thresholds when in different operative conditions but the behavior in response to a protection event is still the same as described below. Protection is active also during soft-start while it is properly masked during DVID transitions with an additional delay to avoid false triggering. Table 8. L6759D protection at a glance 7.1 Overvoltage When the voltage sensed by VSEN and/or SVSEN overcomes the OV threshold, the control- ler acts in order to protect the load from excessive voltage levels, avoiding any possible undershoot. To reach this target, a special sequence is performed as per the following list: ● The reference performs a DVID transition down to 250 mV on the section which triggered the OV protection ● The PWM of the section which triggered the protection are switched between HiZ and zero (ENDRV is kept high) in order to follow the voltage imposed by the DVID on-going. This limits the output voltage excursion, protects the load and assures no undershoot is generated (if Vout < 250 mV, the section is HiZ) ● The PWM of the non-involved section is set permanently to HiZ (ENDRV is kept low) in order to realize a HiZ condition ● OSC/ FLT pin is driven high ● Power supply or EN pin cycling is required to restart operations ● If the cause of the failure is removed, the converter ends the transition with all PWMs in HiZ state and the output voltage of the section which triggered the protection lower than 250 mV. 7.2 Overcurrent The overcurrent threshold must be programmed to a safe value, in order to be sure that each section doesn't enter OC during normal operation of the device. This value must take Section Multi-phase Single-phase Overvoltage (OV) VSEN, SVSEN = +150 mV above reference. Action: IC latch; LS=ON & PWMx = 0 (if applicable); other section: HiZ. Undervoltage (UV) VSEN, SVSEN = 400 mV below reference. Active after Ref > 500 mV Action: IC latch; both sections HiZ. Overcurrent (OC) Current monitor across inductor DCR. Dual protection, per-phase and average. Action: UV-like Dynamic VID Protection masked with additional delay to prevent from false triggering. n/a |
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