L6759D datasheet(30/51 Pages) STMICROELECTRONICS

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Output voltage monitoring and protection

L6759D

30/51

Doc ID 023240 Rev 1

Equation 13

where N is the number of phases and DCR the DC resistance of the inductors. RG

should be designed in worst-case conditions

●

Design the RIMON in order to have the IMON pin voltage to 1.24 V at the IMAX current

specified by the design. It results:

Equation 14

where IMAX is max. current requested by the processor (see Intel documentation for

details)

●

Design the RILIM in order to have the ILIM pin voltage to 2.5 V at the IOC_TOT current

specified above. It results:

Equation 15

where IOC_TOT is the overcurrent switch-over threshold previously defined

●

Adjust the defined values according to the bench-test of the application

●

CILIM in parallel to RILIM can be added with a proper time constant to prevent false OC

tripping and/or delay

●

CIMON in parallel to RIMON can be added to adjust the averaging interval for the current

reporting and/or to adjust the DPM latencies. Additionally, it can be increased to

prevent false Total-OC tripping during DVID.

Note:

This is the typical design flow. Custom design and specifications may require different

settings and ratios between the per-phase OC threshold and the total current OC threshold.

Applications with big ripple across inductors may be required to set per-phase OC to values

different than 110%: the design flow should be modified accordingly.

7.2.2

Overcurrent and power states

When the controller receives the SetPS command through the SVI interface, it automatically

changes the number of working phases. In particular, the maximum number of phases in

which L6759D may work in > PS00h is limited to 2, regardless of the number N configured in

PS00h.

The OC level is then scaled as the controller enters > PS00h, as per Table 9.

1.1

OC_TOT

⋅

() DCR

⋅

OCTH

--------------------------------------------------------------

IMON

1.24V

⋅

MAX

DCR

⋅

---------------------------------

ILIM

2.5V

⋅

OC_TOT

DCR

⋅

-----------------------------------------

Table 9.

Multi-phase section OC scaling and power states

Power state [Hex]

OC level (VOC_TOT)

00h

2 to 3

2.500 V

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