L6759D datasheet(39/51 Pages) STMICROELECTRONICS

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L6759D

System control loop compensation

Doc ID 023240 Rev 1

39/51

System control loop compensation

The control system can be modeled with an equivalent single-phase converter whose only

difference is the equivalent inductor L/N (where each phase has an L inductor and N is the

number of the configured phases), see Figure 16.

Figure 16.

Equivalent control loop

The control loop gain results (obtained opening the loop after the COMP pin):

Equation 21

where:

●

RLL is the equivalent output resistance determined by the droop function (voltage

positioning)

●

ZP(s) is the impedance resulting from the parallel of the output capacitor (and its ESR)

and the applied load RO

●

ZF(s) is the compensation network impedance

●

ZL(s) is the equivalent inductor impedance

●

A(s) is the error amplifier gain

●

is the PWM transfer function.

The control loop gain is designed in order to obtain a high DC gain to minimize static error

and to cross the 0dB axes with a constant -20 dB/dec slope with the desired crossover

frequency

ωT. Neglecting the effect of ZF(s), the transfer function has one zero and two

poles; both the poles are fixed once the output filter is designed (LC filter resonance

ωLC)

and the zero (

ωESR) is fixed by ESR and the droop resistance.

Ref

COMP

RFB

PWM

L/N

ESR

d VCOMP

VOUT

ZF(s)

ZFB(s)

FBR

RGND

LOOP s

()

PWM

F s

()

P s

()

⋅⋅

P s

() Z

L s

()

[]

F s

()

--------------

()

------------

⎝⎠

⎛⎞

⋅

-------------------------------------------------------------------------------------------------------------------------

–

PWM

------

∆V

OSC

-------------------

⋅

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