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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ST7MC1K2 数据表(PDF) 82 Page - STMicroelectronics |
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ST7MC1K2 数据表(HTML) 82 Page - STMicroelectronics |
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82 / 371 page  Obsolete Product(s) - Obsolete Product(s) I/O ports ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto 82/371 Analog alternate function When the pin is used as an ADC input, the I/O must be configured as floating input. The analog multiplexer (controlled by the ADC registers) switches the analog voltage present on the selected pin to the common analog rail which is connected to the ADC input. It is recommended not to change the voltage level or loading on any port pin while conversion is in progress. Furthermore it is recommended not to have clocking pins located close to a selected analog pin. Warning: The analog input voltage level must be within the limits stated in the absolute maximum ratings. 9.3 I/O port implementation The hardware implementation on each I/O port depends on the settings in the DDR and OR registers and specific feature of the I/O port such as ADC Input or true open drain. Switching these I/O ports from one state to another should be done in a sequence that prevents unwanted side effects. Recommended safe transitions are illustrated in Figure 29. Other transitions are potentially risky and should be avoided, since they are likely to present unwanted side-effects such as spurious interrupt generation. Figure 29. Interrupt I/O port state transitions 9.4 Low power modes 01 floating/pull-up interrupt Input 00 floating (reset state) Input 10 open drain Output 11 push-pull Output XX = DDR, OR Table 27. Effect of low power modes on I/O ports Mode Description Wait No effect on I/O ports. External interrupts cause the device to exit from Wait mode. Halt No effect on I/O ports. External interrupts cause the device to exit from Halt mode. Obsolete Product(s) - Obsolete Product(s) |
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