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ST72344S2 数据表(PDF) 22 Page - STMicroelectronics |
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ST72344S2 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 247 page ![]() Pin description ST72344xx, ST2345xx 22/247 Doc ID 12321 Rev 6 27 1 2 PE1/RDI I/O CT X ei0 X X Port E1 SCI receive data in 28 2 3 PB0 I/O CT Xei2 X X Port B0 - 3 4 PB1 (3) I/O CT Xei2 X X Port B1 - 4 5 PB2 (3) I/O CT Xei2 X X Port B2 29 5 6 PB3 I/O CT Xei2 X X Port B3 30 6 7 PB4 (HS) I/O CT HS X ei3 X X Port B4 31 7 8 PD0/AIN0 I/O CT X X X X X Port D0 ADC analog input 0 32 8 9 PD1/AIN1 I/O CT X X X X X Port D1 ADC analog input 1 - 9 10 PD2/AIN2 I/O CT X X X X X Port D2 ADC analog input 2 - 10 11 PD3/AIN3 I/O CT X X X X X Port D3 ADC analog input 3 - 11 12 PD4/AIN4 I/O CT X X X X X Port D4 ADC analog input 4 - 12 13 PD5/AIN5 I/O CT X X X X X Port D5 ADC analog input 5 1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating interrupt input. 2. It is mandatory to connect all available VDD and VDDA pins to the supply voltage and all VSS and VSSA pins to ground. 3. Pulled-up by hardware when not present on the package. 4. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD are not implemented). 5. Internal weak pull-down. Table 3. Device pin description (continued) Pin n° Pin name Level Port Main function (after reset) Alternate function Input (1) Output |
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