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STM8L151C2 数据表(PDF) 96 Page - STMicroelectronics

部件名 STM8L151C2
功能描述  Reset and supply management
PDF  122 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM8L151C2 数据表(HTML) 96 Page - STMicroelectronics

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Electrical parameters
STM8L151x2, STM8L151x3
96/122
DocID018780 Rev 9
tS
Sampling time
VAIN on PF0 fast
channel
VDDA < 2.4 V
0.43(4)(5)
--
µs
VAIN on PF0 fast
channel
2.4 V
≤VDDA≤ 3.6 V
0.22(4)(5)
--
µs
VAIN on slow channels
VDDA < 2.4 V
0.86(4)(5)
--
µs
VAIN on slow channels
2.4 V
≤VDDA≤ 3.6 V
0.41(4)(5)
--
µs
tconv
12-bit conversion time
-
12 + tS
1/fADC1
16 MHz
1(4)
µs
tWKUP
Wakeup time from OFF
state
--
-
3
µs
tIDLE(6)
Time before a new
conversion
TA = +25 °C
-
-
1(7)
s
TA = +70 °C
-
-
20(7)
ms
TA = +125 °C
-
-
2(7)
ms
tVREFINT
Internal reference
voltage startup time
--
-
refer to
Table 44
ms
1. The current consumption through VREF is composed of two parameters:
- one constant (max 300 µA)
- one variable (max 400 µA), only during sampling time + 2 first conversion pulses.
So, peak consumption is 300+400 = 700 µA and average consumption is 300 + [(4 sampling + 2) /16] x 400 = 450 µA at
1Msps
2. VREF- or VDDA must be tied to ground.
3. Guaranteed by design.
4. Minimum sampling and conversion time is reached for maximum Rext = 0.5 k
Ω.
5. Value obtained for continuous conversion on fast channel.
6. The time between 2 conversions, or between ADC1 ON and the first conversion must be lower than tIDLE.
7. The tIDLE maximum value is on the “Z” revision code of the device.
Table 48. ADC1 characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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