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STM32F101XF 数据表(PDF) 86 Page - STMicroelectronics |
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STM32F101XF 数据表(HTML) 86 Page - STMicroelectronics |
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86 / 117 page  Electrical characteristics STM32F101xF, STM32F101xG 86/117 DocID16553 Rev 5 Figure 42. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 50. Otherwise the reset will not be taken into account by the device. 3. The external capacitor on NRST must be placed as close as possible to the device. 5.3.16 TIM timer characteristics The parameters given in Table 51 are guaranteed by design. Refer to Section 5.3.13: I/O current injection characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). Table 51. TIMx(1) characteristics 1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3 and TIM4 timers. Symbol Parameter Conditions Min Max Unit tres(TIM) Timer resolution time -1 - tTIMxCLK fTIMxCLK = 36 MHz 27.8 - ns fEXT Timer external clock frequency on CH1 to CH4 -0 fTIMxCLK/2 MHz fTIMxCLK = 36 MHz 018 MHz ResTIM Timer resolution - - 16 bit tCOUNTER 16-bit counter clock period when internal clock is selected - 1 65536 tTIMxCLK fTIMxCLK = 36 MHz 0.0278 1820 µs tMAX_COUNT Maximum possible count - - 65536 × 65536 tTIMxCLK fTIMxCLK = 36 MHz - 119.2 s |
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