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STM32L432KB 数据表(PDF) 121 Page - STMicroelectronics |
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STM32L432KB 数据表(HTML) 121 Page - STMicroelectronics |
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121 / 149 page  DocID028798 Rev 2 121/149 STM32L432KB STM3L432KC Electrical characteristics 142 Figure 21. Typical connection diagram using the ADC 1. Refer to Table 61: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (refer to Table 56: I/O static characteristics for the value of the pad capacitance). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 3. Refer to Table 56: I/O static characteristics for the values of Ilkg. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 8: Power supply scheme. The 10 nF capacitor should be ceramic (good quality) and it should be placed as close as possible to the chip. |
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