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PIMB063T-R68MS-63 数据表(PDF) 12 Page - Texas Instruments |
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PIMB063T-R68MS-63 数据表(HTML) 12 Page - Texas Instruments |
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12 / 29 page ![]() UDG-13052 R1 VREF 2 V VREF REFIN REFIN 2 TPS51362 R2 0.1 mF Either TPS51362 SLUSBB6A – FEBRUARY 2013 – REVISED JUNE 2013 www.ti.com APPLICATION INFORMATION Functional Overview The TPS51362 is a 10-A, integrated FET synchronous step-down converter with differential voltage feedback support. It uses adaptive on-time D-CAP2 for compensation-less stable loop operation in POSCAP, POSCAP/MLCCs and all MLCCs output capacitor configurations. TPS51362 automatically operates in discontinuous mode to optimize light-load efficiency. An 800-kHz switching frequency enables optimization of the power train for cost, size and efficiency performance of the design. The key feature of the TPS51362 is its ULQ™ mode to enable low-bias current (100 µA in low power mode, enabled by LP#). This feature is extremely beneficial for long battery life in system standby mode. VREF, REFIN, REFIN2 and Output Voltage This device provides a 2.0-V, accurate voltage reference from the VREF pin. This output has a 300-uA sourcing current capability to drive voltage setpoint reference through a voltage divider circuit as shown in Figure 19. To ensure higher overall system voltage accuracy, the sum of the total resistance from VREF to GND should be designed to be more than 67kohm. A MLCC capacitor with a value of 0.1uF or larger should be attached close to the VREF pin. The voltage setpoint range supported by this device is between 0.6 V and 2.0 V. This device also supports resistor-less fixed voltage operation by the use of both REFIN and REFIN2 pins. Table 1 lists all the possible fixed voltage configurations by the REFIN and REFIN2 pin. The TPS51362 detects the state of both REFIN and REFIN2 during the initial startup and decides the output voltage setpoint for the operation. Table 1. REFIN and REFIN2 Pin Settings VOLTAGE (V) VOUT OUTPUT REFIN PIN REFIN2 PIN VOLTAGE (V) (VREFIN) (VREFIN2) GND GND 1.05 Float GND 1.2 GND Float 1.5 Float Float 1.35 Either GND or Resistor dividers Adjustable from 0.6 to 2.0 Float Figure 19. Setting the Output Voltage 12 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS51362 |
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