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PIMB063T-R68MS-63 数据表(PDF) 13 Page - Texas Instruments

部件名 PIMB063T-R68MS-63
功能描述  22-V Input, 10-A Integrated FET Converter With Ultra-Low Quiescent ( ULQ)
PDF  29 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

PIMB063T-R68MS-63 数据表(HTML) 13 Page - Texas Instruments

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Inductor Current
Output Voltage
PWM
SLEW
CSP - CSN
CSP - CSN
SLEW - VOUT
REFIN
UDG-13015
tON
(1)
Time
0
f
gM
(2
C1)
10
£
p ´
TPS51362
www.ti.com
SLUSBB6A – FEBRUARY 2013 – REVISED JUNE 2013
PWM Operation
TPS51362 employs DCAP2 mode operation. It uses an internal phase compensation network (RC1, RC2, CC1, CC2
and gain) to work with very low ESR output capacitors such as multi-layer ceramic capacitor (MLCC). The role of
such network is to sense and scale the current ripple component of the output inductor current information and
then use it in conjunction with the voltage feedback signal to achieve loop stability of the converter.
The transconductance (gM) amplifier and SLEW capacitor (C1) forms an integrator. The output ripple voltage
generated is inversed and averaged by this integrator. The AC information is superimposed onto otherwise DC
information and forms a reference voltage at the input of the PWM comparator. As long as the integrator time
constant is much larger than the inverse of the loop crossover frequency, the AC component is negligible.
where
gM is 60 µS
f0 is 1/3 or 1/4 of the switching frequency (fSW)
(1)
The voltage difference (VSLEW – VVSNS) is then compared to the G×(CSP-CSN) (see Figure 21) voltage at the
PWM comparator inputs. The PWM comparator creates a SET signal to turn on the high-side MOSFET during
each cycle when the current level falls below the loop demand (see Figure 20).
Figure 20. On-Time Waveforms (1)
(1)
ON time is initiated by (VOUT-SLEW) and (CSP-CSN) crossover
Copyright © 2013, Texas Instruments Incorporated
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