CS5371/CS5372

2

DS255PP2

TABLE OF CONTENTS

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1.

CHARACTERISTICS/SPECIFICATIONS....................................................... 4

ANALOG CHARACTERISTICS .................................................................. 4

5.0 AND 3.0 V DIGITAL CHARACTERISTICS ........................................... 6

ABSOLUTE MAXIMUM RATINGS ............................................................. 6

SWITCHING CHARACTERISTICS ............................................................ 7

2.

GENERAL DESCRIPTION. ........................................................................... 8

3.

MODULATOR PERFORMANCE.................................................................. 10

3.1.

Full Scale Signal Performance ......................................................... 10

3.2.

Noise Performance .......................................................................... 10

4.

SIGNAL INPUTS ......................................................................................... 10

4.1.

Differential Inputs - INR+/-, INF+/- ................................................... 10

4.2.

Anti-Alias Filters ............................................................................... 11

4.3.

Input Impedance .............................................................................. 11

4.4.

Maximum Signal Levels ................................................................... 12

5.

INPUT OFFSET ........................................................................................... 12

5.1.

Offset Enable - OFST....................................................................... 12

5.2.

Offset Drift ........................................................................................ 12

6.

VOLTAGE REFERENCE INPUTS .............................................................. 12

6.1.

Voltage Reference Configurations ................................................... 13

6.2.

VREF Input Impedance.................................................................... 13

6.3.

Gain Accuracy.................................................................................. 14

6.4.

Gain Drift .......................................................................................... 14

7.

DIGITAL FILTER INTERFACE .................................................................... 14

7.1.

Modulator Clock - MCLK .................................................................. 14

7.2.

Modulator Data - MDATA................................................................. 14

7.3.

Modulator Sync - MSYNC ................................................................ 15

7.4.

Modulator Flag - MFLAG.................................................................. 15

8.

POWER MODES ......................................................................................... 15

8.1.

Normal Power Mode ........................................................................ 15

8.2.

Low Power Mode - LPWR................................................................ 16

8.3.

Power Down Mode - PWDN............................................................. 16

8.4.

Micro Power Mode ........................................................................... 16

9.

POWER SUPPLY ........................................................................................ 16

9.1.

Power Supply Configurations........................................................... 16

9.2.

Power Supply Bypassing ................................................................. 16

9.3.

SCR Latch-up Considerations.......................................................... 16

9.4.

DC-DC Converter Considerations.................................................... 17

9.5.

Power Supply Rejection ................................................................... 17

10. PIN DESCRIPTION - CS5371 ..................................................................... 18

11. PIN DESCRIPTION - CS5372 ..................................................................... 20

12. PACKAGE DIMENSIONS ............................................................................ 22