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X5083P 数据表(PDF) 8 Page - Xicor Inc.

部件名 X5083P
功能描述  CPU Supervisor with 8Kbit SPI EEPROM
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  XICOR [Xicor Inc.]
网页  http://www.xicor.com
标志 XICOR - Xicor Inc.

X5083P 数据表(HTML) 8 Page - Xicor Inc.

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X5083
Characteristics subject to change without notice.
8 of 21
REV 1.1.6 6/25/02
www.xicor.com
Figure 5. Read Operation Sequence
Figure 6. Read Status Operation Sequence
Figure 7. WREN/WRDI Sequence
0123456789
CS
SCK
SI
SO
High Impedance
Read Instruction
(1 Byte)
Byte Address (2 Byte)
Data Out
15 14
3210
20 21 22 23 24 25 26 27 28 29 30
76543210
01234567
CS
SCK
SI
SO
Read Status
Instruction
SO = Status Reg When no Nonvolatile
Write Cycle
...
...
...
B
L
2
B
L
1
B
L
0
W
D
0
W
D
1
01234567
CS
SI
SCK
High Impedance
SO
Instruction
(1 Byte)



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