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ST8034P 数据表(PDF) 27 Page - STMicroelectronics |
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ST8034P 数据表(HTML) 27 Page - STMicroelectronics |
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27 / 39 page ![]() Functional description ST8034T, ST8034AT, ST8034P, ST8034C 28/40 DocID024587 Rev 4 6.7 Deactivation sequence When a session ends, the microcontroller sets CMDVCC high. The ST8034 device then executes an automatic deactivation sequence by counting the sequencer back to the inactive state (see Figure 13): 1. RST goes low (t11). 2. The clock is stopped, CLK is low (t12). 3. I/O is pulled low (t13). 4. VCC falls to 0 V (t14). The deactivation sequence is completed when VCC reaches its inactive state. 5. VCC < 0.4 V (tDEACT). 6. All card contacts become low impedance to GND. The I/OUC pin remains pulled up to VDD(INTF) by the internal 10 k pull-up resistor. 7. The internal oscillator returns to its low frequency mode. Time delays t11 = t10 + 3T / 64 t12 = t11 + T / 2 t13 = t11 + T t14 = t11 + 3T / 2 tDEACT = t11 + 3T / 2 + VCC fall time. T = 64 x 1/fOSC(INT) Figure 13. Deactivation sequence |
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