ST8034P datasheet(28/39 Pages) STMICROELECTRONICS

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ST8034T, ST8034AT, ST8034P, ST8034C

Functional description

6.8

VCC generator

The LDO on the VCC output is capable of supplying up to 65 mA continuously at any

selected VCC value (5 V or 3 V, or even 1.8 V in the case of ST8034P). This output is

overcurrent protected by a current limiter with a limit threshold value of 120 mA typ., with

a glitch immunity allowing overcurrent pulses up to 200 mA with duration up to several

microseconds not causing a deactivation (the average current value must stay below the

specified current limit, see Table 7 on page 14 and Table 11 on page 21).

A 100 nF capacitor (min.) with ESR < 350 m

 should be tied to GND near the VCC pin and

another low ESR 100 nF capacitor (min.) should be tied to GND also on the card side, near

the card reader contact C1.

6.9

Fault detection

The fault conditions monitored by the device are:



Short-circuit or overcurrent on the VCC pin



Card removal during transaction



VDD falling



VDDP falling



VDD(INTF) falling



Overheating.

There are two different fault detection situations:



Outside card session (CMDVCC pin is high): the OFF pin is low if the card is not in the

reader and high if the card is in the reader. Any voltage drop on VDD, VDDP or VDD(INTF)

is detected by the voltage supervisor. This generates an internal power-on reset pulse

but does not act upon the OFF pin signal. The card is not powered-up and short-circuits

or overheating are not detected.



In card session (CMDVCC pin is low): when the OFF pin goes low, the fault detection

circuit triggers the automatic emergency deactivation sequence (see Figure 14).

On card insertion or removal, bouncing can occur on the card presence switch (i.e. on the

PRES signal). Therefore a debouncing feature is integrated in the ST8034 (4.5 ms typically,

tDEB = 640 × 1/fOSC(INT)LOW). See Figure 15.

On card insertion, the OFF pin goes high after the debounce time has elapsed. When the

card is extracted, the automatic card deactivation sequence is performed on the first

high to low transition on the PRES pin. After this, the OFF pin goes low.

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