R5F104LED datasheet(54/213 Pages) RENESAS

54 / 213 page

RL78/G14

2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85

°C)

R01DS0053EJ0330 Rev. 3.30

Page 54 of 208

Aug 12, 2016

2.1

Absolute Maximum Ratings

Note 1.

Connect the REGC pin to VSS via a capacitor (0.47 to 1

μF). This value regulates the absolute maximum rating of the

REGC pin. Do not use this pin with voltage applied to it.

Note 2.

Must be 6.5 V or lower.

Note 3.

Do not exceed AVREF (+) + 0.3 V in case of A/D conversion target pin.

Caution

Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter.

That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical

damage, and therefore the product must be used under conditions that ensure that the absolute maximum

ratings are not exceeded.

Remark 1.

Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port pins.

Remark 2.

AVREF (+): + side reference voltage of the A/D converter.

Remark 3.

VSS: Reference voltage

Absolute Maximum Ratings

(1/2)

Parameter

Symbols

Conditions

Ratings

Unit

Supply voltage

VDD

-0.5 to +6.5

EVDD0, EVDD1 EVDD0 = EVDD1

-0.5 to +6.5

EVSS0, EVSS1 EVSS0 = EVSS1

-0.5 to +0.3

REGC pin input voltage

VIREGC

REGC

-0.3 to +2.8

and -0.3 to VDD +0.3 Note 1

Input voltage

VI1

P00 to P06, P10 to P17, P30, P31,

P40 to P47, P50 to P57, P64 to P67,

P70 to P77, P80 to P87, P100 to P102,

P110, P111, P120, P140 to P147

-0.3 to EVDD0 +0.3

and -0.3 to VDD +0.3 Note 2

VI2

P60 to P63 (N-ch open-drain)

-0.3 to +6.5

VI3

P20 to P27, P121 to P124, P137,

P150 to P156, EXCLK, EXCLKS, RESET

-0.3 to VDD +0.3 Note 2

Output voltage

VO1

P00 to P06, P10 to P17, P30, P31,

P40 to P47, P50 to P57, P60 to P67,

P70 to P77, P80 to P87, P100 to P102,

P110, P111, P120, P130, P140 to P147

-0.3 to EVDD0 +0.3

and -0.3 to VDD +0.3 Note 2

VO2

P20 to P27, P150 to P156

-0.3 to VDD +0.3 Note 2

Analog input voltage

VAI1

ANI16 to ANI20

-0.3 to EVDD0 +0.3

and -0.3 to AVREF(+) +0.3 Notes 2, 3

VAI2

ANI0 to ANI14

-0.3 to VDD +0.3

and -0.3 to AVREF(+) +0.3 Notes 2, 3

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