数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

R5F104LED 数据表(PDF) 87 Page - Renesas Technology Corp

部件名 R5F104LED
功能描述  True Low Power Platform
PDF  213 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F104LED 数据表(HTML) 87 Page - Renesas Technology Corp

Back Button R5F104LED Datasheet HTML 83Page - Renesas Technology Corp R5F104LED Datasheet HTML 84Page - Renesas Technology Corp R5F104LED Datasheet HTML 85Page - Renesas Technology Corp R5F104LED Datasheet HTML 86Page - Renesas Technology Corp R5F104LED Datasheet HTML 87Page - Renesas Technology Corp R5F104LED Datasheet HTML 88Page - Renesas Technology Corp R5F104LED Datasheet HTML 89Page - Renesas Technology Corp R5F104LED Datasheet HTML 90Page - Renesas Technology Corp R5F104LED Datasheet HTML 91Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 87 / 213 page
background image
RL78/G14
2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85
°C)
R01DS0053EJ0330 Rev. 3.30
Page 87 of 208
Aug 12, 2016
Note 1.
When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to SCKp↓” when
DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
Note 2.
When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from SCKp↓” when
DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
Note 3.
When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The delay time to SOp output becomes “from
SCKp↑” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
Note 4.
C is the load capacitance of the SOp output lines.
Note 5.
The maximum transfer rate when using the SNOOZE mode is 1 Mbps.
Caution
Select the normal input buffer for the SIp pin and SCKp pin and the normal output mode for the SOp pin by using
port input mode register g (PIMg) and port output mode register g (POMg).
(4)
During communication at same potential (CSI mode) (slave mode, SCKp... external clock input)
(TA = -40 to +85°C, 1.6 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Parameter
Symbol
Conditions
HS (high-speed main)
mode
LS (low-speed main)
mode
LV (low-voltage main)
mode
Unit
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
SCKp cycle
time Note 5
tKCY2
4.0 V
≤ EVDD0 ≤ 5.5 V 20 MHz < fMCK
8/fMCK
——
ns
fMCK
≤ 20 MHz
6/fMCK
6/fMCK
6/fMCK
ns
2.7 V
≤ EVDD0 ≤ 5.5 V 16 MHz < fMCK
8/fMCK
——
ns
fMCK
≤ 16 MHz
6/fMCK
6/fMCK
6/fMCK
ns
2.4 V
≤ EVDD0 ≤ 5.5 V
6/fMCK
and 500
6/fMCK
and 500
6/fMCK
and 500
ns
1.8 V
≤ EVDD0 ≤ 5.5 V
6/fMCK
and 750
6/fMCK
and 750
6/fMCK
and 750
ns
1.7 V
≤ EVDD0 ≤ 5.5 V
6/fMCK
and 1500
6/fMCK
and 1500
6/fMCK
and 1500
ns
1.6 V
≤ EVDD0 ≤ 5.5 V
—6/fMCK
and 1500
6/fMCK
and 1500
ns
SCKp high-/
low-level width
tKH2,
tKL2
4.0 V
≤ EVDD0 ≤ 5.5 V
tKCY2/2 - 7
tKCY2/2 - 7
tKCY2/2 - 7
ns
2.7 V
≤ EVDD0 ≤ 5.5 V
tKCY2/2 - 8
tKCY2/2 - 8
tKCY2/2 - 8
ns
1.8 V
≤ EVDD0 ≤ 5.5 V
tKCY2/2 - 18
tKCY2/2 - 18
tKCY2/2 - 18
ns
1.7 V
≤ EVDD0 ≤ 5.5 V
tKCY2/2 - 66
tKCY2/2 - 66
tKCY2/2 - 66
ns
1.6 V
≤ EVDD0 ≤ 5.5 V
—tKCY2/2 - 66
tKCY2/2 - 66
ns
SIp setup time
(to SCKp↑)
Note 1
tSIK2
2.7 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 20
1/fMCK + 30
1/fMCK + 30
ns
1.8 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 30
1/fMCK + 30
1/fMCK + 30
ns
1.7 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 40
1/fMCK + 40
1/fMCK + 40
ns
1.6 V
≤ EVDD0 ≤ 5.5 V
—1/fMCK + 40
1/fMCK + 40
ns
SIp hold time
(from SCKp↑)
Note 2
tKSI2
1.8 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 31
1/fMCK + 31
1/fMCK + 31
ns
1.7 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 250
1/fMCK + 250
1/fMCK + 250
ns
1.6 V
≤ EVDD0 ≤ 5.5 V
—1/fMCK + 250
1/fMCK + 250
ns
Delay time
from SCKp↓ to
SOp output
Note 3
tKSO2
C = 30 pF Note 4
2.7 V
≤ EVDD0 ≤ 5.5 V
2/fMCK
+ 44
2/fMCK
+ 110
2/fMCK
+ 110
ns
2.4 V
≤ EVDD0 ≤ 5.5 V
2/fMCK
+ 75
2/fMCK
+ 110
2/fMCK
+ 110
ns
1.8 V
≤ EVDD0 ≤ 5.5 V
2/fMCK
+ 100
2/fMCK
+ 110
2/fMCK
+ 110
ns
1.7 V
≤ EVDD0 ≤ 5.5 V
2/fMCK
+ 220
2/fMCK
+ 220
2/fMCK
+ 220
ns
1.6 V
≤ EVDD0 ≤ 5.5 V
—2/fMCK
+ 220
2/fMCK
+ 220
ns



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com