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R5F104LED 数据表(PDF) 76 Page - Renesas Technology Corp |
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R5F104LED 数据表(HTML) 76 Page - Renesas Technology Corp |
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76 / 213 page ![]() RL78/G14 2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85 °C) R01DS0053EJ0330 Rev. 3.30 Page 76 of 208 Aug 12, 2016 2.4 AC Characteristics Note The following conditions are required for low voltage interface when EVDD0 < VDD 1.8 V ≤ EVDD0 < 2.7 V: MIN. 125 ns 1.6 V ≤ EVDD0 < 1.8 V: MIN. 250 ns Remark fMCK: Timer array unit operation clock frequency (Operation clock to be set by the CKSmn bit of timer mode register mn (TMRmn). m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3)) (TA = -40 to +85°C, 1.6 V ≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Items Symbol Conditions MIN. TYP. MAX. Unit Instruction cycle (min- imum instruction exe- cution time) TCY Main system clock (fMAIN) operation HS (high-speed main) mode 2.7 V ≤ VDD ≤ 5.5 V 0.03125 1 μs 2.4 V ≤ VDD < 2.7 V 0.0625 1 μs LS (low-speed main) mode 1.8 V ≤ VDD ≤ 5.5 V 0.125 1 μs LV (low-voltage main) mode 1.6 V ≤ VDD ≤ 5.5 V 0.25 1 μs Subsystem clock (fSUB) operation 1.8 V ≤ VDD ≤ 5.5 V 28.5 30.5 31.3 μs In the self- program- ming mode HS (high-speed main) mode 2.7 V ≤ VDD ≤ 5.5 V 0.03125 1 μs 2.4 V ≤ VDD < 2.7 V 0.0625 1 μs LS (low-speed main) mode 1.8 V ≤ VDD ≤ 5.5 V 0.125 1 μs LV (low-voltage main) mode 1.8 V ≤ VDD ≤ 5.5 V 0.25 1 μs External system clock frequency fEX 2.7 V ≤ VDD ≤ 5.5 V 1.0 20.0 MHz 2.4 V ≤ VDD ≤ 2.7 V 1.0 16.0 MHz 1.8 V ≤ VDD < 2.4 V 1.0 8.0 MHz 1.6 V ≤ VDD < 1.8 V 1.0 4.0 MHz fEXS 32 35 kHz External system clock input high-level width, low-level width tEXH, tEXL 2.7 V ≤ VDD ≤ 5.5 V 24 ns 2.4 V ≤ VDD ≤ 2.7 V 30 ns 1.8 V ≤ VDD < 2.4 V 60 ns 1.6 V ≤ VDD < 1.8 V 120 ns tEXHS, tEXLS 13.7 μs TI00 to TI03, TI10 to TI13 input high-level width, low-level width tTIH, tTIL 1/fMCK + 10 Note ns Timer RJ input cycle fC TRJIO 2.7 V ≤ EVDD0 ≤ 5.5 V 100 ns 1.8 V ≤ EVDD0 < 2.7 V 300 ns 1.6 V ≤ EVDD0 < 1.8 V 500 ns Timer RJ input high- level width, low-level width tTJIH, tTJIL TRJIO 2.7 V ≤ EVDD0 ≤ 5.5 V 40 ns 1.8 V ≤ EVDD0 < 2.7 V 120 ns 1.6 V ≤ EVDD0 < 1.8 V 200 ns |
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