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R5F104LED 数据表(PDF) 158 Page - Renesas Technology Corp

部件名 R5F104LED
功能描述  True Low Power Platform
PDF  213 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F104LED 数据表(HTML) 158 Page - Renesas Technology Corp

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RL78/G14
3. ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS TA = -40 to +105
°C)
R01DS0053EJ0330 Rev. 3.30
Page 158 of 208
Aug 12, 2016
Caution
Select the normal input buffer for the SIp pin and SCKp pin and the normal output mode for the SOp pin by using
port input mode register g (PIMg) and port output mode register g (POMg).
Remark
p: CSI number (p = 00), m: Unit number (m = 0), n: Channel number (n = 0), g: PIM number (g = 3, 5)
CSI mode connection diagram (during communication at same potential)
CSI mode connection diagram (during communication at same potential)
(Slave Transmission of slave select input function (CSI00))
Remark 1.
p: CSI number (p = 00, 01, 10, 11, 20, 21, 30, 31)
Remark 2.
m: Unit number, n: Channel number (mn = 00 to 03, 10 to 13)
(3)
During communication at same potential (CSI mode) (slave mode, SCKp... external clock input)
(TA = -40 to +105°C, 2.4 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
(2/2)
Parameter
Symbol
Conditions
HS (high-speed main) mode
Unit
MIN.
MAX.
SSI00 setup time
tSSIK
DAPmn = 0
2.7 V
≤ EVDD0 ≤ 5.5 V
240
ns
2.4 V
≤ EVDD0 ≤ 5.5 V
400
ns
DAPmn = 1
2.7 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 240
ns
2.4 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 400
ns
SSI00 hold time
tKSSI
DAPmn = 0
2.7 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 240
ns
2.4 V
≤ EVDD0 ≤ 5.5 V
1/fMCK + 400
ns
DAPmn = 1
2.7 V
≤ EVDD0 ≤ 5.5 V
240
ns
2.4 V
≤ EVDD0 ≤ 5.5 V
400
ns
SCKp
SOp
User's device
SCK
SI
SIp
SO
RL78 microcontroller
SCK00
SO00
User's device
SCK
SI
SI00
SO
SSI00
SSO
RL78 microcontroller



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