HT82K95EE/HT82K95AE

Rev. 1.50

23

April 13, 2012

The definitions of the USB/PS2 status and control register (USC; 1AH) are as shown.

Bit No.

Label

R/W

Function

0

SUSP

R

Read only, USB suspend indication. When this bit is set to

²1² (set by SIE), it indi-

cates the USB bus enters suspend mode. The USB interrupt is also triggered on any

changes of this bit.

1

RMWK

W

USB remote wake up command. It is set by MCU to force the USB host leaving the

suspend mode. When this bit is set to

²1²,2ms delay for clearing this bit to ²0² is

needed to insure the RMWK command is accepted by SIE.

2

URST

R/W

USB reset indication. This bit is set/cleared by USB SIE. This bit is used to detect

which bus (PS2 or USB) is attached. When the URST is set to

²1², this indicates that

a USB reset has occurred (the attached bus is USB) and a USB interrupt will be ini-

tialized.

3

RESUME

R

USB resume indication. When the USB leaves the suspend mode, this bit is set to

²1² (set by SIE). This bit will appear 20ms waiting for the MCU to detect. When the

RESUME is set by the SIE, an interrupt will be generated to wake-up the MCU. In or-

der to detect the suspend state, the MCU should set the USBCKEN and clear

SUSP2 (in SCC register) to enable the SIE detecting function. The RESUME will be

cleared while the SUSP is going

²0². When the MCU is detecting the SUSP, the RE-

SUME (wakes-up the MCU ) should be remembered and taken into consideration.

4

PS2DAI

R

Read only, USBD-/DATA input

5

PS2CKI

R

Read only, USBD+/CLK input

6

PS2DAO

W

Data for driving the USBD-/DATA pin when working under 3D PS2 mouse function.

(Default=

²1²)

7

PS2CKO

W

Data for driving the USBD+/CLK pin when working under 3D PS2 mouse function.

(Default=

²1²)

USC (1AH) Register

The USR (USB endpoint interrupt status register) register is used to indicate which endpoint is accessed and to select

the serial bus (PS2 or USB). The endpoint request flags (EP0IF, EP1IF and EP2IF) are used to indicate which end-

points are accessed. If an endpoint is accessed, the related endpoint request flag will be set to

²1² and the USB inter-

rupt will occur (if the USB interrupt is enabled and the stack is not full). When the active endpoint request flag is served,

the endpoint request flag has to be cleared to

²0².

Bit No.

Label

R/W

Function

0

EP0IF

R/W

When this bit is set to

²1² (set by the SIE), it indicates the endpoint 0 is accessed and

a USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

1

EP1IF

R/W

When this bit is set to

²1² (set by the SIE), it indicates the endpoint 1 is accessed and

a USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

2

EP2IF

R/W

When this bit is set to

²1² (set by the SIE), it indicates the endpoint 2 is accessed and

a USB interrupt will occur. When the interrupt has been served, this bit should be

cleared by firmware.

3, 6

¾¾

Reserved

4

SPS2

R/W

The PS2 function is selected when this bit is set to

²1². (Default=²0²)

5

SUSB

R/W

The USB function is selected when this bit is set to

²1². (Default=²0²)

7

USB_flag

R/W

This flag is used to show the MCU is in USB mode. (Bit=1)

This bit is R/W by FW and will be cleared to

²0² after power-on reset. (Default=²0²)

USR (1BH) Register