CS61884 datasheet(21/72 Pages) CIRRUS

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CS61884

DS485PP4

3.8 JTAG Test Interface

3.9 Miscellaneous

SYMBOL

LQFP

FBGA

TYPE

DESCRIPTION

TRST

G12

JTAG Reset

This active Low input resets the JTAG controller. This input

is pulled up internally and may be left as a NC when not

used.

TMS

F11

JTAG Test Mode Select Input

This input enables the JTAG serial port when active High.

This input is sampled on the rising edge of TCK. This input

is pulled up internally and may be left as a NC when not

used.

TCK

F14

JTAG Test Clock

Data on TDI is valid on the rising edge of TCK. Data on

TDO is valid on the falling edge of TCK. When TCK is

stopped high or low, the contents of all JTAG registers re-

main unchanged. Tie pin low through a 10 K

Ω resistor

when not used.

TDO

F13

JTAG Test Data Output

JTAG test data is shifted out of the device on this pin. Data

is output on the falling edge of TCK. Leave as NC when not

used.

TDI

F12

JTAG Test Data Input

JTAG test data is shifted into the device using this pin. The

pin is sampled on the rising edge of TCK. TDI is pulled up

internally and may be left as a NC when not used.

SYMBOL

LQFP

FBGA

TYPE

DESCRIPTION

REF

H13

Reference Input

This pin must be tied to ground through 13.3 K

Ω 1% resis-

tor. This pin is used to set the internal current level.

CS61884 数据表(PDF) 21 Page - Cirrus Logic

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CS61884 数据表(PDF) 21 Page - Cirrus Logic

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