Data Sheet

AD7902

Rev. B | Page 7 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 4. Pin Configuration

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 6

REF1, REF2

AI

Reference Input Voltage. The REFx range is 2.4 V to 5.1 V. These pins are referred to the GND pin, and

decouple each pin closely to the GND pin with a 10 µF capacitor.

2, 7

VDD1,

VDD2

P

Power Supplies.

3, 8

IN1+, IN2+

AI

Pseudo Differential Positive Analog Inputs.

4, 9

IN1−, IN2−

AI

Pseudo Differential Negative Analog Inputs.

5, 10

GND

P

Power Supply Ground.

11, 16

CNV2,

CNV1

DI

Conversion Inputs. These inputs have multiple functions. On the leading edge, they initiate conversions

and select the interface mode of the device: chain mode or active low chip select mode (CS mode). In CS

mode, the SDOx pins are enabled when the CNVx pins are low. In chain mode, the data must be read when

the CNVx pins are high.

12, 17

SDO2,

SDO1

DO

Serial Data Outputs. The conversion result is output on these pins. The conversion result is synchronized

to SCKx.

13, 18

SCK2, SCK1

DI

Serial Data Clock Inputs. When the device is selected, the conversion results are shifted out by these clocks.

14, 19

SDI2, SDI1

DI

Serial Data Inputs. These inputs provide multiple functions. They select the interface mode of the ADC, as

follows: CS mode is selected if the SDIx pins are high during the CNVx rising edge. In this mode, either SDIx

or CNVx can enable the serial output signals when low. If SDIx or CNVx is low when the conversion is

complete, the busy indicator feature is enabled.

15, 20

VIO2, VIO1

P

Input/Output Interface Digital Power. Nominally at the same supply as the host interface (2.5 V or 3 .3 V).

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

VDD1

IN1+

IN1–

VDD2

REF2

GND

REF1

SDI1

SCK1

SDO1

SDI2

VIO2

CNV1

GND

IN2–

IN2+

CNV2

SDO2

SCK2

VIO1

AD7902

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(Not to Scale)