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PIC12CE673 数据表(PDF) 8 Page - Microchip Technology |
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PIC12CE673 数据表(HTML) 8 Page - Microchip Technology |
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8 / 116 page ![]() PIC12CE67X DS40181B-page 8 Preliminary © 1998 Microchip Technology Inc. FIGURE 3-1: PIC12CE67X BLOCK DIAGRAM Power-up Timer Oscillator Start-up Timer EPROM Program Memory 13 Data Bus 8 14 Program Bus Instruction reg Program Counter RAM File Registers Direct Addr 7 RAM Addr (1) 9 Addr MUX Indirect Addr FSR reg STATUS reg MUX ALU W reg Instruction Decode & Control Timing Generation OSC1/CLKIN OSC2/CLKOUT MCLR VDD, VSS Timer0 GPIO 8 8 GP4/OSC2/AN3/CLKOUT GP3/MCLR/Vpp GP2/T0CKI/AN2/INT GP1/AN1/VREF GP0/AN0 8 3 GP5/OSC1/CLKIN 8 Level Stack (13 bit) 128 bytes Note 1: Higher order bits are from the STATUS register. A/D Watchdog Timer Power-on Reset Device PIC12CE673 PIC12CE674 Program Memory Data Memory (RAM) 1K x 14 2K x 14 128 x 8 128 x 8 4 MHz Clock Internal Non-Volatile Memory (EEPROM) 16 x 8 16 x 8 Data Memory 16x8 EEPROM |
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