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AD6640ST/PCB 数据表(PDF) 19 Page - Analog Devices |
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AD6640ST/PCB 数据表(HTML) 19 Page - Analog Devices |
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19 / 25 page ![]() AD6640 –18– REV. A ADCs VARIABLE IF1 IF2 FIXED NARROWBAND FILTER NARROWBAND FILTER I Q LNA RF e.g. 900MHz SHARED ONE RECEIVER PER CHANNEL Figure 25. Narrowband Digital Receiver Architecture If demodulation takes place in the analog domain, then tradi- tional discriminators, envelop detectors, phase locked loops, or other synchronous detectors are generally employed to strip the modulation from the selected carrier. However, as general-purpose DSP chips such as the ADSP-2181 become more popular, they will be used in many baseband- sampled applications like the one shown in Figure 25. As shown in the figure, prior to ADC conversion, the signal must be mixed down and filtered, and the I and Q components separated. These functions are realizable through DSP techniques; however, several key technology breakthroughs are required: high dynamic range ADCs such as the AD6640, new DSPs (highly programmable with onboard memory, fast), digital tuners and filters such as the AD6620, wide band mixers, and amplifiers. WIDEBAND ADC FIXED WIDEBAND MIXER WIDEBAND FILTER LNA RF e.g. 900MHz SHARED "n" CHANNELS TO DSP 12.5MHz (416 CHANNELS) CHANNEL SELECTION DIGITAL TUNER/FILTER DSP DIGITAL TUNER/FILTER DSP Figure 26. Wideband Digital Receiver Architecture Figure 26 shows such a wideband system. This design shows that the front-end variable local oscillator has been replaced with a fixed oscillator and the back end has been replaced with a wide dynamic range ADC, digital tuner, and DSP. This technique offers many benefits. First, many passive discrete components that formed the tuning and filtering functions have been elimi- nated. These passive components often require tweaking and special handling during assembly and final system alignment. Digital components require no such adjustments; tuner and filter characteristics are always exactly the same. Moreover, the tuning and filtering characteristics can be changed through software. Since software is used for demodulation, different routines may be used to demodulate different standards such as AM, FM, GMSK, or any other desired standard. In addition, as new standards arise or new software revisions are generated, they may be field installed with standard software update channels. A radio that performs demodulation in software as opposed to hardware is often referred to as a soft radio because it may be changed or modified simply through code revision. System Description In the wideband digital radio (Figure 26), the first down conver- sion functions in much the same way as a block converter does. An entire band is shifted in frequency to the desired intermediate frequency. In the case of cellular base station receivers, 5 MHz to 30 MHz of bandwidth are down-converted simultaneously to an IF frequency suitable for digitizing with a wideband analog- to-digital converter. Once digitized the broadband digital data stream contains all of the in-band signals. The remainder of the radio is constructed digitally using special purpose and general purpose programmable DSP to perform filtering, demodulation and signal conditioning not unlike the analog counter parts. In the narrowband receiver (Figure 25), the signal to be received must be tuned. This is accomplished by using a variable local oscillator at the first mix down stage. The first IF then uses a narrow-band filter to reject out-of-band signals and condition the selected carrier for signal demodulation. In the digital wideband receiver (Figure 26), the variable local oscillator has been replaced with a fixed oscillator, so tuning must be accomplished in another manner. Tuning is performed digitally using a digital-down conversion and filter chip fre- quently called a channelizer. The term channelizer is used because the purpose of these chips is to select one channel out of many within the broadband spectrum present in the digital data stream of the ADC. DECIMATION FILTER LOW-PASS FILTER DIGITAL TUNER COS SIN DECIMATION FILTER LOW-PASS FILTER DATA I Q Figure 27. AD6620 Digital Channelizer Figure 27 shows the block diagram of a typical channelizer, such as the AD6620. Channelizers consist of a complex NCO (numerically controlled oscillator), dual multiplier (mixer), and matched digital filters. These are the same functions that would be required in an analog receiver, but implemented in digital form. The digital output from the channelizer is the desired car- rier, frequently in I & Q format; all other signals have been fil- tered and removed based on the filtering characteristics desired. Since the channelizer output consists of one selected RF channel, one tuner chip is required for each frequency received, although only one wideband RF receiver is needed for the entire band. Data from the channelizer may then be processed using a digital signal processor such as the ADSP-2181 or the SHARC ® proces- sor, the ADSP-21062. This data may then be processed through software to demodulate the information from the carrier. System Requirements Figure 28 shows a typical wideband receiver subsystem based around the AD6640. This strip consists of a wideband IF filter, amplifier, ADC, latches, channelizer, and interface to a digital signal processor. This design shows a typical clocking scheme used in many receiver designs. All timing within the system is referenced back to a single clock. While this is not necessary, it does facilitate PLL design, ease of manufacturing, system test, and calibration. Keeping in mind that the overall performance goal is to maintain the best possible dynamic range, many con- siderations must be made. One of the biggest challenges is selecting the amplifier used to drive the AD6640. Since this is a communications application, it is common to directly sample an intermediate frequency (IF) signal. As such, IF gain blocks can be implemented instead of baseband op amps. For these gain block amplifiers, the critical specifications are third order intercept point and noise figure. A |
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