| 数据搜索系统,热门电子元器件搜索 |
|
M41ST87WMX6 数据表(PDF) 22 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M41ST87WMX6 数据表(HTML) 22 Page - STMicroelectronics |
|
22 / 42 page ![]() M41ST87Y, M41ST87W 22/42 Tamper Detection Operation The Tamper Pins are triggered based on the state of an external switch. Two switch mode options are available, “Normally Open” or “Normally Closed,” based on the setting of the Tamper Con- nect Mode Bit (TCMX). If the selected switch mode is Normally Open (TCMX = '1'), the Tamper Pin will be triggered by being connected to VSS (if the TPMX Bit is set to '0') or to VCC (if the TPMX Bit is set to '1'), through the closing of the external switch. When the external switch is closed, the Tamper Bit will be immediately set, allowing the user to determine if the device has been physically tampered with. If the selected switch mode is Nor- mally Closed (TCMX = '0'), the Tamper Pin will be triggered by being pulled to VSS or to VOUT (de- pending on the state of the TPMX Bit), through an internal pull-up/pull-down resistor as a result of opening the external switch. When a tamper event occurs, the Tamper Bits (TB1 and/or TB2) will be immediately set if TEBX = '1.' If the Tamper Interrupt Enable Bit (TIEX) is set to a '1,' the IRQ/OUT pin will also be activated. The IRQ/OUT output is cleared by a READ of the Flags Register (as seen in Figure 24., page 28), a reset of the TIE Bit to '0,' or the RST output is enabled. Note: In order to avoid an inadvertent activation of the IRQ/OUT pin due to a prior tamper event, the Flag Register (0Fh) should be read prior to reset- ting the TEBX Bit. The Tamper Bits are “Read only” bits and are reset only by writing the Tamper Enable Bit (TEBX) to '0.' The Tamper Detect function operates both under normal power, and in battery back-up. Even if the trigger event occurs during a power-down condi- tion, the bit will be set correctly. Sampling As the Switch Mode Normally Closed (TCMX ='0') requires a greater amount of current to maintain constant monitoring, the M41ST87Y/W offers a programmable Tamper Detect Sampling Bit (TDSX) to reduce the current drawn on VCC or VBAT (see Figure 17., page 19). When enabled, the sampling frequency is once per second (1Hz), for approximately 1ms. When TEBX is disabled, no current will be drawn by the Tamper Detection Circuit. After a tamper event has been detected, no additional current will be drawn. Note: The oscillator must be running for Tamper Detection to operate in the sampling mode. If the oscillator is stopped, the Tamper Detection Circuit will revert to constant monitoring. Note: Sampling in the Tamper High Mode (TPMX = '1') may be bypassed while on VCC by connecting the TPXIN pin to VCC through an exter- nal resistor. This will allow constant monitoring when VCC is “On” and revert to sampling when in battery back-up (see Figure 14., page 16). Internal Tamper Pull-up/down Current Depending on the capacitive and resistive loading of the Tamper Pin Input (TPXIN), the user may re- quire more or less current from the internal pull-up/ down used when monitoring the Normally Closed switch mode. The state of the Tamper Current Hi/ Tamper Current Low Bit (TCHI/TCLOX) deter- mines the sizing of the internal pull-up/-down. TCHI/TCLOX = '1' uses a 1MΩ pull-up/-down re- sistor, while TCHI/TCLOX = '0' uses a 10MΩ pull- up/-down resistor (see Figure 18., page 19). |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |