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L9678P 数据表(PDF) 104 Page - STMicroelectronics |
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L9678P 数据表(HTML) 104 Page - STMicroelectronics |
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104 / 203 page  SPI interface L9678P, L9678P-S 104/203 DocID029274 Rev 3 5.1.44 Safing records data mask registers (SAF_DATA_MASK_x) Safing record data mask for record 1 (SAF_DATA_MASK_1) Safing record data mask for record 2 (SAF_DATA_MASK_2) Safing record data mask for record 3 (SAF_DATA_MASK_3) Safing record data mask for record 4 (SAF_DATA_MASK_4) Address: CC (SAF_DATA_MASK_1) CD (SAF_DATA_MASK_2) CE (SAF_DATA_MASK_3) CF (SAF_DATA_MASK_4) Type: RW Buffer: $CC00 (SAF_DATA_MASK_1) $CD00 (SAF_DATA_MASK_2) $CE00 (SAF_DATA_MASK_3) $CF00 (SAF_DATA_MASK_4) Reset: $8098 (SAF_DATA_MASK_1) $809A (SAF_DATA_MASK_2) $809C (SAF_DATA_MASK_3) $809E (SAF_DATA_MASK_4) 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MOSI - SAF_DATA_MASKx[15:0] MISO 0 0 0 0 SAF_DATA_MASKx[15:0] SAF_DATA_MASKx[ 15:0] 0000 0000 0000 Safing Data Mask for safing record x - 16-bit data mask that is bit-wise ANDed with MISO data from SPI monitor Updated by SSM_RESET or SPI write while in DIAG state |
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