15

PC755/745

2138D–HIREL–06/03

Figure 5 shows the allowable undershoot and overshoot voltage on the PC755 and

PC745.

Figure 5. Overshoot/Undershoot Voltage

The PC755 provides several I/O voltages to support both compatibility with existing sys-

tems and migration to future systems. The PC755 core voltage must always be provided

at nominal 2.0V (see Table 5 for actual recommended core voltage). Voltage to the L2

I/Os and Processor Interface I/Os are provided through separate sets of supply pins and

may be provided at the voltages shown in Table 4. The input voltage threshold for each

bus is selected by sampling the state of the voltage select pins BVSEL and L2VSEL dur-

ing operation. These signals must remain stable during part operation and cannot

change. The output voltage will swing from GND to the maximum voltage applied to the

OV

Table 4 describes the input threshold voltage setting.

Notes:

1. Caution: The input threshold selection must agree with the OV

2. The input threshold settings above are different for all revisions prior to Rev. 2.8 (Rev. E). For more information, contact your

local Atmel sales office.

(L2) OVDD +20%

(L2) OVDD +5%

(L2) OVDD

Gnd - 1.0V

Gnd - 0.3V

Gnd

Not to exceed 10%

Table 4. Input Threshold Voltage Setting

Part Revision

BVSEL Signal

Processor Bus Interface Voltage

L2VSEL Signal

L2 Bus Interface Voltage

E

0

Not Available

0

Not Available

1

2.5V/3.3V

1

2.5V/3.3V