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MB9BF412RPMC-G-JNE2 数据表(PDF) 94 Page - Cypress Semiconductor

部件名 MB9BF412RPMC-G-JNE2
功能描述  32-bit Arm짰 Cortex짰-M3 FM3 Microcontroller
PDF  112 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

MB9BF412RPMC-G-JNE2 数据表(HTML) 94 Page - Cypress Semiconductor

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Document Number: 002-05615 Rev. *D
Page
94 of 112
MB9B410R Series
12.4.15
JTAG Timing
(VCC = 2.7V to 5.5V, VSS = 0V, TA = - 40°C to + 85°C)
Parameter
Symbol
Pin name
Conditions
Value
Unit
Remarks
Min
Max
TMS, TDI setup time
tJTAGS
TCK,
TMS, TDI
VCC ≥ 4.5 V
15
-
ns
VCC < 4.5 V
TMS, TDI hold time
tJTAGH
TCK,
TMS, TDI
VCC ≥ 4.5 V
15
-
ns
VCC < 4.5 V
TDO delay time
tJTAGD
TCK,
TDO
VCC ≥ 4.5 V
-
25
ns
VCC < 4.5 V
-
45
Note:
− When the external load capacitance = 30 pF.
TCK
TMS/TDI
TDO



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