CY2VC511 datasheet(6/7 Pages) CYPRESS

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PRELIMINARY

CY2VC511

Document Number: 001-10796 Rev. *D

Page 6 of 7

Document History Page

Document Title: CY2VC511 27 MHz Clock Generator with VCXO

Document Number: 001-10796

Rev.

ECN No.

Orig. of

Change

Submission

Date

Description of Change

506248

RGL

See ECN

New data sheet

1285703

JWK/KVM/

ARI

See ECN

Changed definition of nominal frequency to VIN = 1.65V

Added CLOAD specification

Changed RUP value

Corrected TR/TF conditions and specification

Removed pull down resistor on SEL

Updated several drawings

Edited data sheet for template compliance

2705638

XHT/KVM/

AESA

05/13/2009

Changed title from Low Noise Clock Generator with VCXO to 27 MHz Clock

Generator with VCXO, Basic configuration change: Reference changed from

crystal to driven clock, Output changed from 216 MHz to 27 MHz, Pinout changed

to show no connects, Pin 11 changed to DNU, VDD range changed from ±0.2V to

±5%, Thermal resistance data added, IOL & IOH changed from 2mA to 4mA

Phase noise specs removed, IIVIN changed from 10

μA to 60μA, Rise & fall times

changed, IDD changed

2768029

KVM

09/18/2009

Remove reference to OE/PD# pin in IDD spec

Change parameter name IIVIN to IVIN

Change parameter LIN to INLVIN, add note to definition

Add max limit for TR, TF: 1.5 ns

Change TLOCK max from 10 ms to 5 ms

2905106

KVM

05/14/10

Updated package diagram.

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