PRELIMINARY

CY2VC511

Document Number: 001-10796 Rev. *D

Page 2 of 7

Pinout

Figure 1. Pin Diagram - 16-Pin TSSOP

VSS

1

2

314

15

16

REFIN

VDD

VDD

DNU

VSS

NC

VDD

NC

NC

VSS

4

5

611

12

13

CLK

NC

DNU

7

89

10

NC

VIN

Table 1. Pin Definitions - 16-Pin TSSOP

Pin

Name

Type

Description

1

REFIN

1.8V CMOS Input

Reference Clock Input

9

VIN

Analog Input

VCXO Control Voltage - VIN has a positive control slope; that is, increasing the

voltage on VIN causes the output frequency to increase

The nominal output frequency is determined when VIN = 1.65V

13

CLK

CMOS Output

27 MHz Output Clock

11, 16

DNU

–

Do Not Use: DNU pins are electrically connected, but perform no function

5, 6, 10, 12, 14

NC

–

No Connect: NC pins are not connected to the die

2, 3, 4

VDD

Power

Supply Voltage: 3.3V

7, 8, 15

VSS

Power

Ground

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