PRELIMINARY

CY2VC511

27 MHz Clock Generator with VCXO

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

•

408-943-2600

Document Number: 001-10796 Rev. *D

Revised May 14, 2010

Features

Description

The CY2VC511 is a PLL based clock generator with VCXO

control. It takes a low swing 27 MHz reference clock, and

generates an adjustable 27 MHz output clock. The device has a

single LVCMOS output and operates from a 3.3V power supply.

The VIN pin is an analog input that enables the user to pull the

output frequency. The pullability range is at least 230 ppm (±115

ppm). The pull curve is very linear.

Unlike conventional VCXO designs, the output frequency

adjustment is achieved by a proprietary PLL design. This permits

the use of 27 MHz clock reference.

VIN

LOW -NOISE

PLL

REFIN

CLK

Logic Block Diagram

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