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SLK2721IPZP 数据表(PDF) 7 Page - Texas Instruments |
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SLK2721IPZP 数据表(HTML) 7 Page - Texas Instruments |
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7 / 21 page ![]() SLK2721 OC48+FEC/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER WITH ENHANCED JITTER TOLERANCE SLLS532 − JUNE 2002 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 detailed description The SLK2721 device is designed to support the OC-48/24/12/3 data rates. It also supports a higher data rate that may be required for FEC support, up to 2.7 Gbps. The operating data speed can be configured through the RSEL0 and RSEL1 pins as indicated in Table 1 for normal SONET rates. For FEC support, the clock and data rates need to be scaled up as required. The highest data and clock rates supported are 675 Mbps and 675 MHz, respectively. Table 1. Data Rate Select SERIAL DATA RATE RSEL0 RSEL1 PARALLEL LVDS DATA RATE TXCLK/RXCLK OC-48: 2.488 Gbps 0 0 622.08 Mbps 622.08 MHz OC-24: 1.244 Gbps 1 0 311.04 Mbps 311.04 MHz OC-12: 622 Mbps 0 1 155.52 Mbps 155.52 MHz OC-3: 155.52 Mbps 1 1 38.88 Mbps 38.88 MHz The user can also enable the autorate detection circuitry through the AUTO_DETECT pin. The device automatically detects the OC-N of the data line rate and generates two bits of output to indicate the data rate to other devices in the system. When using AUTO_DETECT, RSEL0 and RSEL1 need to be set to 00 or be unconnected. Table 2. Data Rate Reporting Under Autorate Detection Mode SERIAL DATA RATE RATEOUT0 RATEOUT1 PARALLEL LVDS DATA RATE TXCLK/RXCLK OC-48: 2.488 Gbps 0 0 622.08 Mbps 622.08 MHz OC-24: 1.244 Gbps 1 0 311.04 Mbps 311.04 MHz OC-12: 622 Mbps 0 1 155.52 Mbps 155.52 MHz OC-3: 155.52 Mbps 1 1 38.88 Mbps 38.88 MHz The SLK2721 device has four operational modes controlled by two configuration pins. Table 3 lists these operational modes. When the device is put in a certain mode, unused circuit blocks are powered down to conserve system power. While the transceiver mode, transmit only mode, and receive only mode are straightforward, the repeater mode of operation is shown in Figure 4. The receive serial data is recovered by the extracted clock, and it is then sent back out on the transmit serial outputs. The data eye is open both vertically and horizontally in this process. In the repeater mode, the user can select to turn on the RX demultiplexer function through RX_MONITOR pin and allow the parallel data to be presented. This feature enables the repeater device not only to repeat but also to listen in. Table 3. Operational Modes MODE CONFIG0 CONFIG1 DESCRIPTION 1 0 0 Full duplex transceiver mode 2 0 1 Transmit only mode 3 1 0 Receive only mode 4 1 1 Repeater mode high-speed electrical interface The high-speed serial I/O uses a PECL-compatible interface. The line could be directly coupled or ac-coupled. Refer to Figures 10 and 11 for configuration details. As shown in the figures, an on-chip 100- Ω termination resistor is placed differentially at the receive end. |
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