ST6262C datasheet(22/78 Pages) STMICROELECTRONICS

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ST62T52C ST62T62C/E62C

3.2 RESETS

The MCU can be reset in four ways:

– by the external Reset input being pulled low;

– by Power-on Reset;

– by the digital Watchdog peripheral timing out.

– by Low Voltage Detection (LVD)

3.2.1 RESET Input

The RESET pin may be connected to a device of

the application board in order to reset the MCU if

required. The RESET pin may be pulled low in

RUN, WAIT or STOP mode. This input can be

used to reset the MCU internal state and ensure a

correct start-up procedure. The pin is active low

and features a Schmitt trigger input. The internal

Reset signal is generated by adding a delay to the

external signal. Therefore even short pulses on

the RESET pin are acceptable, provided VDD has

completed its rising phase and that the oscillator is

running correctly (normal RUN or WAIT modes).

The MCU is kept in the Reset state as long as the

RESET pin is held low.

If RESET activation occurs in the RUN or WAIT

modes, processing of the user program is stopped

(RUN mode only), the Inputs and Outputs are con-

figured as inputs with pull-up resistors and the

main Oscillator is restarted. When the level on the

RESET pin then goes high, the initialization se-

quence is executed following expiry of the internal

delay period.

If RESET pin activation occurs in the STOP mode,

the oscillator starts up and all Inputs and Outputs

are configured as inputs with pull-up resistors.

When the level of the RESET pin then goes high,

the initialization sequence is executed following

expiry of the internal delay period.

3.2.2 Power-on Reset

The function of the POR circuit consists in waking

up the MCU by detecting around 2V a dynamic

(rising edge) variation of the VDD Supply. At the

beginning of this sequence, the MCU is configured

in the Reset state: all I/O ports are configured as

inputs with pull-up resistors and no instruction is

executed. When the power supply voltage rises to

a sufficient level, the oscillator starts to operate,

whereupon an internal delay is initiated, in order to

allow the oscillator to fully stabilize before execut-

ing the first instruction. The initialization sequence

is executed immediately following the internal de-

lay.

To ensure correct start-up, the user should take

care that the VDD Supply is stabilized at a suffi-

cient level for the chosen frequency (see recom-

mended operation) before the reset signal is re-

leased. In addition, supply rising must start from

0V.

As a consequence, the POR does not allow to su-

pervise static, slowly rising, or falling, or noisy

(presenting oscillation) VDD supplies.

An external RC network connected to the RESET

pin, or the LVD reset can be used instead to get

the best performances.

Figure 13. Reset and Interrupt Processing

INT LATCH CLEARED

NMI MASK SET

RESET

( IF PRESENT )

SELECT

NMI MODE FLAGS

IS RESET STILL

PRESENT?

YES

PUT FFEH

ON ADDRESS BUS

FROM RESET LOCATIONS

FFE/FFF

FETCH INSTRUCTION

LOAD PC

VA000427

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