ISL6277

FN8270 Rev 1.00

Page 35 of 37

Mar 8, 2012

27

LGATE1

Use sufficient trace width (>30mil). Avoid routing this signal near any sensitive analog signal traces or crossing

over them.

28

PWM_Y

No special considerations.

29

VDD

A high quality, X7R dielectric MLCC capacitor is recommended to decouple this pin to GND. Place the capacitor

in close proximity to the pin with the filter resistor nearby the IC.

30

VDDP

A high quality, X7R dielectric MLCC capacitor is recommended to decouple this pin to GND. Place the capacitor

in close proximity to the pin.

31

LGATE2

Use sufficient trace width (>30mil). Avoid routing this signal near any sensitive analog signal traces or crossing

over them.

32

PHASE2

These two signals should be routed together in parallel. Each trace should have sufficient width (>30mil). Avoid

routing these signals near sensitive analog signal traces or crossing over them. Routing PHASE2 to the Core VR

Channel 2 high-side MOSFET source pin instead of a general connection to PHASE2 copper is recommended for

better performance.

33

UGATE2

34

BOOT2

Use a wide trace width (>30mil). Avoid routing any sensitive analog signal traces close to or crossing over this

trace.

35

VIN

Place the decoupling capacitor in close proximity to the pin with a short connection to the internal GND plane.

36

BOOTX

Use a wide trace width (>30mil). Avoid routing any sensitive analog signal traces close to or crossing over this

trace.

37

UGATEX

These two signals should be routed together in parallel. Each trace should have sufficient width (>30mil). Avoid

routing these signals near sensitive analog signal traces or crossing over them. Routing PHASEX to the high-side

MOSFET source pin instead of a general connection to the PHASEX copper is recommended for better

performance.

38

PHASEX

39

LGATEX

Use sufficient trace width (>30mil). Avoid routing this signal near any sensitive analog signal traces or crossing

over them.

40

PWM2_NB

No special considerations.

41

FCCM_NB

42

PGOOD_NB

No special consideration.

43

COMP_NB

Place the compensation components in general proximity of the controller.

44

FB_NB

45

VSEN_NB

Place the filter on this pin in close proximity to the controller for good coupling.

46

ISUMN_NB

Place the current sensing circuit in general proximity of the controller.

Place capacitor Cn very close to the controller.

Place the NTC thermistor next to Core VR Channel 1 inductor so it senses the inductor temperature correctly.

Each phase of the power stage sends a pair of VSUMP and VSUMN signals to the controller. Run these two

signals traces in parallel fashion with decent width (>20mil).

IMPORTANT: Sense the inductor current by routing the sensing circuit to the inductor pads. If possible, route the

traces on a different layer from the inductor pad layer and use vias to connect the traces to the center of the

pads. If no via is allowed on the pad, consider routing the traces into the pads from the inside of the inductor.

The following drawings show the two preferred ways of routing current sensing traces.

47

ISUMP_NB

48

ISEN1_NB

TABLE 14. LAYOUT CONSIDERATIONS FOR THE ISL6277 CONTROLLER (Continued)

ISL6277 PIN

SYMBOL

LAYOUT GUIDELINES

INDUCTOR

CURRENT-SENSING TRACES

VIAS

INDUCTOR

CURRENT-SENSING TRACES