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ISL97649AIRZ 数据表(PDF) 3 Page - Renesas Technology Corp

部件名 ISL97649AIRZ
功能描述  TFT-LCD Supply DCP VCOM Amplifier Gate Pulse Modulator RESET
PDF  22 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

ISL97649AIRZ 数据表(HTML) 3 Page - Renesas Technology Corp

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ISL97649A
FN7928 Rev 3.00
Page 3 of 22
June 27, 2013
Pin Descriptions
PIN#
SYMBOL
DESCRIPTION
1
FB
AVDD boost converter feedback. Connect to the center of a voltage divider between AVDD and GND to set the AVDD voltage.
2PGND
Power ground
3
CE
Gate Pulse Modulator Delay Control. Connect a capacitor between this pin and GND to set the delay time.
4
RE
Gate Pulse Modulator Slew Control. Connect a resistor between this pin and GND to set the falling slew rate.
5
VGH
Gate Pulse Modulator High Voltage Input. Place a 0.1µF decoupling capacitor close to the VGH pin.
6
VGHM
Gate Pulse Modulator Output for gate driver IC
7
VFLK
Gate Pulse Modulator Control input from TCON
8
VDPM
Gate Pulse Modulator Enable. Connect a capacitor from VDPM to GND to set the delay time before GPM is enabled. A current
source charges the capacitor on VDPM.
9
GPM_LO
Gate Pulse Modulator Low Voltage Input; place a 0.47µF decoupling capacitor close to the GPM_LO pin.
10
AVDD
DCP and VCOM amplifier high voltage analog supply; place a 0.47µF decoupling capacitor close to the AVDD pin.
11
SCL
I2C comparable clock input
12
SDA
I2C compatible serial bidirectional data line
13
POS
VCOM Amplifier Non-inverting input
14
RSET
DCP sink current adjustment pin; connect a resistor between this pin and GND to set the resolution of the DCP output voltage.
15
VOUT
VCOM Amplifier output
16
NEG
VCOM Amplifier inverting input
17
VDIV
Voltage detector threshold. Connect to the center of a resistive divider between VIN and GND.
18
ADJ
VLOGIC LDO feedback. Connect to the center of a resistive divider between L_OUT and GND to set VLogic voltage for TCON.
19
RESET
Voltage detector reset output
20
L_OUT
LDO output. Connect at least one 1µF capacitor to GND for stable operation.
21
CD2
Voltage detector rising edge delay. Connect a capacitor between this pin and GND to set the rising edge delay.
22
L_IN
LDO input. Connect a 1µF decoupling capacitor close to this pin.
23
SS
Boost Converter Soft-Start. Connect a capacitor between this pin and GND to set the soft-start time.
24
COMP
Boost converter compensation pin. Connect a series resistor and capacitor between this pin and GND to optimize transient
response and stability.
25
FREQ
Boost Converter frequency select; pull it to logic high to operate boost at 1.2MHz. Connect this pin to GND to operate boost at
600kHz.
26
VIN
IC input supply. Connect a 0.1µF decoupling capacitor close to this pin.
27
LX
AVDD boost converter switching node
28
EN
AVDD enable pin
Ordering Information
PART NUMBER
(Notes 2, 3)
PART
MARKING
VIN RANGE
(V)
TEMP RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL97649AIRZ (Note 1)
97649 AIRZ
2.5 to 5.5
-40 to +85
28 Ld 4x5 QFN
L28.4x5A
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL97649A For more information on MSL please see techbrief TB363.



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