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ADL5202ACPZ-R7 数据表(PDF) 21 Page - Analog Devices

部件名 ADL5202ACPZ-R7
功能描述  Wide Dynamic Range, High Speed Digitally Controlled VGA
PDF  29 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL5202ACPZ-R7 数据表(HTML) 21 Page - Analog Devices

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Data Sheet
ADL5202
Rev. D | Page 21 of 29
An alternative narrow-band approach is presented in Figure 59.
By designing a narrow band-pass antialiasing filter between the
ADL5202 and the target ADC, the output noise of the ADL5202
outside of the intended Nyquist zone can be attenuated, helping
to preserve the available SNR of the ADC. In general, the SNR
improves by several decibels (dB) when including a reasonable
order antialiasing filter. In this example, a low loss 1:3 input
transformer is used to match the 150 Ω balanced input of the
ADL5202 to a 50 Ω unbalanced source, resulting in minimum
insertion loss at the input.
Figure 59 is optimized for driving some of the Analog Devices
popular unbuffered ADCs, such as the AD9246, AD9640,
and AD6655. Table 8 includes antialiasing filter component
recommendations for popular IF sampling center frequencies.
Inductor L5 works in parallel with the on-chip ADC input
capacitance and a portion of the capacitance presented by C4 to
form a resonant tank circuit. The resonant tank helps to ensure
that the ADC input acts like a real resistance at the target center
frequency.
In addition, the L6 inductor shorts the ADC inputs at dc, which
introduces a zero into the transfer function. The ac coupling
capacitors and the bias chokes introduce additional zeros into the
transfer function. The final overall frequency response takes on
a band-pass characteristic, helping to reject noise outside of the
intended Nyquist zone. Table 8 provides initial suggestions for
prototyping purposes. Some empirical optimization may be
needed to help compensate for actual PCB parasitics.
LAYOUT CONSIDERATIONS
The ADL5202 has two output pins for each polarity, and they
are oriented in an alternating fashion. When designing the board,
care should be taken to minimize the parasitic capacitance due
to the routing that connects the corresponding outputs together.
A good practice is to avoid any ground or power plane under
this routing region and under the chokes to minimize the
parasitic capacitance.
If the common-mode load capacitance including the capaci-
tance of the trace is > 2 pF, use parasitic suppressing resistors
at the device output pins. The resistors should be placed in
the output traces just after the crossover connections. Use 5 Ω
series resistors (Size 0402) to adequately de-Q the output
system without a significant decrease in gain.
L6
50Ω
AC
1:3
75
75
1µH
5V
1µH
5V
CML
C4
4pF
5V
1nF
1nF
1nF
L1
L3
L5
L1
L3
L5
1nF
DIGITAL
INTERFACE
1/2
ADL5202
C2
4pF
AD9246
AD9640
AD6655
Figure 59. Narrow-Band IF Sampling Solution for Unbuffered ADC Applications
Table 8. Interface Filter Recommendations for Various IF Sampling Frequencies
Center Frequency
1 dB Bandwidth
L1
C2
L3
C4
L5
L6
96 MHz
27 MHz
68 nH
15 pF
220 nH
15 pF
68 nH
150 nH
140 MHz
31 MHz
47 nH
11 pF
150 nH
11 pF
47 nH
82 nH
170 MHz
25 MHz
39 nH
10 pF
120 nH
10 pF
47 nH
51 nH
211 MHz
40 MHz
30 nH
7 pF
100 nH
7.5 pF
30 nH
43 nH



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