M69AW024B datasheet(18/29 Pages) STMICROELECTRONICS

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M69AW024B

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Note: 1. The minimum value must be equal to or greater than the sum of actual tELEH (or tWLWH).

2. The new write address is valid from either E1 High or W High.

3. tAXGL1 is specified from end of tAVAX (Min) and is a reference value when access time is determined by tAXGL1. If actual value is

lower than specified minimum value, tAXGL1 is increased by the difference between the actual value and the specified minimum

value.

4. tAXGL1 maximum is applicable if E1 is kept Low and both W and G are kept High.

5. tAXGL2 is the absolute minimum value if the Write cycle terminates with W and E1 Low.

6. tGHEL (Min) must be kept if the Read cycle is not performed prior to the Write cycle. In case G is disabled after a time tGHEL(Min),

W must go Low tELEH2 (Min) after E1 goes Low. In other words, the Read cycle is initiated if tGHEL (Min) is not kept.

7. Applicable if E1 stays Low after the Read cycle.

8. tELEH or tWLWH is applicable if the Write operation is initiated by E1 or W, respectively.

9. If the write operation is terminated by W followed by E1 High, the sum of actual tELWL and tWLWH and the sum of actual tAVWL and

tWLWH must be equal or greater than 60ns.

10. tEHEL1 or tWHWL is applicable if the Write operation is terminated by E1 or W, respectively. If E1 goes High before tWHWL (Min), then

tEHEL1 (Min) must apply.

11. tEHEL1 and tEHEL2 is applicable if write operation is terminated by E1 and W, respectively. In case E1 is brought to High before sat-

isfaction of tEHEL2 (min), the tEHEL1 (min) is also applied.

12. For other timings please refer to Table 7., Read and Standby Modes AC Characteristics.

tWLEL

tWS

Write Enable Low Set-up Time

tWLWH

(1,8)

tWP

Write Enable Write Pulse Width

tWLWL

tWC

Write Enable Write Cycle Time

Symbol

Alt.

Parameter

M69AW024B

Unit

–60

–70

Min

Max

Min

Max

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