T48C893 datasheet(14/82 Pages) ATMEL

14 / 82 page

T48C893

Rev. A4, 22-Jan-02

14 (82)

Reset

timer

Power–on

reset

Internal

reset

res

CL=SYSCL/4

Brown–out

detection

Watch–

dog

CWD

res

Ext. clock

supervisor

ExIn

Pull-up

NRST

13752

Figure 9. Reset configuration

3.3.1

Power-on Reset and Brown-out

Detection

The T48C893 has a fully integrated power-on reset and

brown-out detection circuitry. For reset generation no ex-

ternal components are needed .

These circuits ensure that the core is held in the reset state

until the minimum operating supply voltage has been

reached. A reset condition will also be generated should

the supply voltage drop momentarily below the minimum

operating level except when a power down mode is

activated (the core is in SLEEP mode and the peripheral

clock is stopped). In this power-down mode the brown-

out detection is disabled.

Two values for the brown-out voltage threshold are

programmable via the BOT-bit in the SC-register.

CPU

Reset

BOT = ’1’

2.0 V

1.7 V

CPU

Reset

BOT = ’0’

= 1.5 ms (typically)

13753

BOT = 1, low brown-out voltage threshold. (1.7 V) is reset value.

BOT = 0, high brown-out voltage threshold (2.0 V).

Figure 10. Brown-out detection

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