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HMC6832ALP5LE 数据表(PDF) 8 Page - Analog Devices |
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HMC6832ALP5LE 数据表(HTML) 8 Page - Analog Devices |
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8 / 23 page  HMC6832 Data Sheet Rev. C | Page 8 of 23 Table 5. Phase Noise Floor Parameter Min Typ Max Unit Test Conditions/Comments SINGLE-SIDEBAND (SSB PHASE NOISE FLOOR) Single-ended input; differential output; measured with saturated amplifier to remove AM noise (only affects 100 MHz data); LVPECL RTERM = 150 Ω; LVDS RTERM = 100 Ω; VDD = 2.5 V; see Figure 43 and Figure 44 for phase noise measurement test circuits Input Carrier Frequency LVPECL Termination 100 MHz −165.7 dBc/Hz 622 MHz −168.0 dBc/Hz 1000 MHz −166.0 dBc/Hz 1600 MHz −164.8 dBc/Hz 1750 MHz −165.0 dBc/Hz 2000 MHz −165.9 dBc/Hz 3000 MHz −164.4 dBc/Hz LVDS Termination 100 MHz −164.2 dBc/Hz 622 MHz −167.9 dBc/Hz 1000 MHz −166.4 dBc/Hz 1600 MHz −165.9 dBc/Hz 1750 MHz −166.0 dBc/Hz 2000 MHz −165.2 dBc/Hz 3000 MHz −162.4 dBc/Hz TIMING CHARACTERISTICS TA = 25°C, unless otherwise noted. Minimum/maximum values are guaranteed by design and characterization. Table 6. Parameter Min Typ Max Unit Test Conditions/Comments TYPICAL CHANNEL SKEW ±5 ps Relative to OUTP5, VDD = 2.5 V or 3.3 V TYPICAL PROPAGATION DELAY LVPECL Termination 201 ps VDD = 2.375 V to 3.6 V LVDS Termination 207 ps VDD = 2.375 V to 2.625 V TYPICAL DELAY VARIATION At TA = 25°C LVPECL Termination ±5 ps VDD = 2.375 V to 3.6 V, measurement uncertainty = ±2 ps LVDS Termination ±5 ps VDD = 2.375 V to 2.625 V, measurement uncertainty = ±2 ps At TA = −40°C to +85°C LVPECL Termination ±13 ps VDD = 2.375 V to 3.6 V, measurement uncertainty = ±4 ps LVDS Termination ±13 ps VDD = 2.375 V to 2.625 V, measurement uncertainty = ±4 ps PROCESS PROPAGATION DELAY VARIATION −18 +18 ps Process simulation, VDD = 2.5 V TIMING SPECIFICATIONS VDD = 2.5 V or 3.3 V, TA = 25°C, unless otherwise noted. Table 7. Parameter Typical Unit Description tSKEW ±5 ps Output skew tR 57/45 ps Output rise/fall time (LVPECL/LVDS) tF 59/46 ps Output rise/fall time (LVPECL/LVDS) tD 201/207 ps Propagation delay (LVPECL/LVDS) |
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