IX6611

R00A

PRELIMINARY

11

Figure 6. IX6611 Typical Application Diagram

3. Theory of Operation

The IX6611 integrated circuit is designed to provide gate drive for high power IGBT modules. The device converts the

incoming isolated PWM logic signals into a +15V/-5V bipolar gate drive signal with a typical 10A peak drive current

capability.

3.1 Detailed Circuit Description

3.1.1

Input Interface

The Input Interface block of the gate driver is designed

to be compatible with pulse transformers. The receiver

inputs, RCVP and RCVN, are connected to the pulse

transformer secondary through a diode/resistor

network as shown on the typical application diagram

Figure 6 on page 11. The Input Interface contains

high speed Schmitt trigger buffers with 1V typical

hysteresis. To reject noise and high frequency

interference, a well matched full differential

architecture is used for the Schmitt trigger buffer

receivers.

3.1.2

Pulse Recovery Logic

The Pulse Recovery Logic block receives the leading

edge pulse and trailing edge pulse signals from the

Input Interface and reconstructs the complementary

IN and INB drive signals. These complementary

signals are level shifted to drive the Gate Control Logic

block.

3.1.3

Gate Control Logic

The Gate Control Logic block inserts a fixed dead time

between the incoming IN and INB signals to generate

non-overlapping PGATE drive and NGATE drive

signals. This dead time is sufficient to prevent

V

CC

V

CC

V

DD

V

DD

COM

COM

REF2

REF1

OVLO

COMP

UVLO

COMP

VREF IBLANK

REF0

REF1

REF2

REF3

REF4

300mV

V

DD

V

DD

V

DD

V

EE

V

EE

LEVEL

SHIFT

FAULT

CONTROL

LOGIC

OUTPUT

FAULT PULSE

GENERATOR

V

EE

V

EE

FLT1

FLT2

V

EE

NC

V

DD

V

DD

V

DD

V

DD

V

EE

V

EE

V

EE

V

EE

V

EE

V

EE

V

CC

V

EE

RCVP

RCVN

INB

IN

V

EE

PULSE

RECOVERY

LOGIC

LEVEL

SHIFT

THSD

ACL

COMP

OC

COMP

300mV

3.1V

RICM

EN

OFF

EN

ON

ACL

ICM

V

CC

V

CC

V

CC

V

DD

V

DD

V

CC

V

EE

V

EE

V

EE

V

EE

C

BLANK

REF0

IBLANK

LEB

COMP

5V REGULATOR

REFERENCED

TO V

EE

V

CC

V

CC

V

EE

PV

CC

PV

CC

OUTP

OUTN

PV

EE

PV

EE

V

EE

V

EE

V

CC

ON

OFF

PGATE

NGATE

GATE

CONTROL

LOGIC

6

4

3

9

11

7

5

10

2

1

16

15

13

12

8

14

V

EE

V

EE

RON

ROFF

R1

R2

V

V

CC

R

SENSE

HV

COM

V

DD

50

50

50

3.3V

V

EE

50

50

50

VIN

22

µF

22

µF

PV

EE

VP=+15V

VN=-5V

PV

CC