AD5624BCPZ-R2 datasheet(10/23 Pages) AD

10 / 23 page

AD5624/AD5664

Data Sheet

Rev. A | Page 10 of 23

IDD (mA)

0.39

0.40

0.41

0.42

0.43

VDD = 3.6V

TA = 25°C

Figure 17. IDD Histogram with VDD = 3.6 V

I (mA)

0.20

–0.25

–0.20

–0.15

–0.10

–0.05

0.05

0.10

0.15

–5

–4

–3

–2

–1

VDD = VREF = 5V, 3V

TA = 25°C

DAC LOADED WITH

ZERO SCALE –

SINKING CURRENT

DAC LOADED WITH

FULL SCALE –

SOURCING CURRENT

Figure 18. Headroom at Rails vs. Source and Sink Current

TEMPERATURE (°C)

0.50

0.05

0.10

0.15

0.20

0.35

0.40

0.25

0.30

0.45

–40

–20

100

TA = 25°C

VDD = VREFIN = 5V

VDD = VREFIN = 3V

Figure 19. Supply Current vs. Temperature

TIME BASE = 4µs/DIV

VDD = VREF = 5V

TA = 25°C

FULL-SCALE CODE CHANGE

0x0000 TO 0xFFFF

OUTPUT LOADED WITH 2k

Ω

AND 200pF TO GND

VOUT = 909mV/DIV

Figure 20. Full-Scale Settling Time, 5 V

CH1 2.0V

CH2 500mV

M100µs 125MS/s

A CH1

1.28V

8.0ns/pt

VDD = VREF = 5V

TA = 25°C

VOUT

VDD

MAX(C2)

420.0mV

Figure 21. Power-On Reset to 0 V

VDD = 5V

SYNC

SLCK

VOUT

CH1 5.0V

CH3 5.0V

CH2 500mV

M400ns

A CH1

1.4V

Figure 22. Exiting Power-Down to Midscale

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