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UP9303ASAC 数据表(PDF) 14 Page - uPI Group Inc.

部件名 UP9303ASAC
功能描述  5V/12V Synchronous-Rectified Buck Controller
PDF  18 Pages
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制造商  UPI [uPI Group Inc.]
网页  http://www.ubiq-semi.com/
标志 UPI - uPI Group Inc.

UP9303ASAC 数据表(HTML) 14 Page - uPI Group Inc.

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uP9303
14
uP9303-DS-F0101, Aug. 2017
www.upi-semi.com
Power MOSFET Selection
External component selection is primarily determined by
the maximum load current and begins with the selection
of power MOSFET switches. The uP9303 requires two
external N-channel power MOSFETs for upper (controlled)
and lower (synchronous) switches. Important parameters
for the power MOSFETs are the breakdown voltage V
(BR)DSS,
on-resistance R
DS(ON), reverse transfer capacitance CRSS,
maximum current I
DS(MAX), gate supply requirements, and
thermal management requirements.
The gate drive voltage is powered by VCC pin that receives
10.8V~13.2V supply voltage. When operating with a 12V
power supply for VCC (or down to a minimum supply
voltage of 8V), a wide variety of NMOSFETs can be used.
Logic-level threshold MOSFET should be used if the input
voltage is expected to drop below 8V. Since the lower
MOSFET is used as the current sensing element,
particular attention must be paid to its on-resistance. Look
for R
DS(ON) ratings at lowest gate driving voltage.
Special cautions should be exercised on the lower switch
exhibiting very low threshold voltage V
GS(TH). The shoot-
through protection present aboard the uP9303 may be
circumvented by these MOSFETs if they have large
parasitic impedances and/or capacitances that would
inhibit the gate of the MOSFET from being discharged
below its threshold level before the complementary
MOSFET is turned on. Also avoid MOSFETs with
excessive switching times; the circuitry is expecting
transitions to occur in under 50 nsec or so.
In high-current applications, the MOSFET power
dissipation, package selection and heatsink are the
dominant design factors. The power dissipation includes
two loss components; conduction loss and switching loss.
The conduction losses are the largest component of power
dissipation for both the upper and the lower MOSFETs.
These losses are distributed between the two MOSFETs
according to duty cycle. Since the uP9303 is operating in
continuous conduction mode, the duty cycles for the
MOSFETs are:
IN
OUT
UP
V
V
D
=
;
IN
OUT
IN
LO
V
V
V
D
=
The resulting power dissipation in the MOSFETs at
maximum output current are:
OSC
SW
IN
OUT
UP
)
ON
(
DS
2
OUT
UP
f
T
V
I
5
.
0
D
R
I
P
×
×
×
×
+
×
×
=
LO
)
ON
(
DS
2
OUT
LO
D
R
I
P
×
×
=
where TSW is the combined switch ON and OFF time.
Application Information
Both MOSFETs have I2R losses and the top MOSFET
includes an additional term for switching losses, which
are largest at high input voltages. The bottom MOSFET
losses are greatest when the bottom duty cycle is near
88%, during a short-circuit or at high input voltage. These
equations assume linear voltage current transitions and
do not adequately model power loss due the reverse-
recovery of the lower MOSFET’s body diode. Ensure that
both MOSFETs are within their maximum junction
temperature at high ambient temperature by calculating
the temperature rise according to package thermal-
resistance specifications. A separate heatsink may be
necessary depending upon MOSFET power, package
type, ambient temperature and air flow.
The gate-charge losses are dissipated by the uP9303 and
don’t heat the MOSFETs. However, large gate charge
increases the switching interval, TSW that increases the
MOSFET switching losses. The gate-charge losses are
calculated as:
OSC
RSS
IN
LO
_
ISS
UP
_
ISS
CC
CC
G
f
)
C
V
)
C
C
(
V
(
V
P
×
×
+
+
×
×
=
where CISS_UP is the input capacitance of the upper
MOSFET, CISS_LO is the input capacitance of the lower
MOSFET, and CRSS_UP is the reverse transfer capacitance
of the upper MOSFET. Make sure that the gate-charge
loss will not cause over temperature at uP9303, especially
with large gate capacitance and high supply voltage.
Output Inductor Selection
Output inductor selection usually is based the
considerations of inductance, rated current, size
requirement, and DC resistance (DC)
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple
current:
)
V
V
1
(
V
L
f
1
I
IN
OUT
OUT
OUT
OSC
L
×
×
×
=
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a tradeoff between
component size, efficiency and operating frequency. A
reasonable starting point is to choose a ripple current that
is about 40% of IOUT(MAX).
There is another tradeoff between output ripple current/
voltage and response time to a transient load. Increasing
the value of inductance reduces the output ripple current
and voltage. However, the large inductance values reduce
the converter’s response time to a load transient.
Maximum current ratings of the inductor are generally



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