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M36LLR8760T1, M36LLR8760D1, M36LLR8760M1, M36LLR8760B1

Figure 2. Logic Diagram

Table 1. Signal Names

Note: 1. A22 is an Address Input for the two Flash memories only.

A23 is for the 256Mb Flash memory component only.

AI10908b

24

A0-A23

DQ0-DQ15

M36LLR8760T1

M36LLR8760D1

M36LLR8760M1

M36LLR8760B1

16

VSS

WAIT

L

K

Address Inputs

DQ0-DQ15 Common Data Input/Output

L

Common Flash and PSRAM Latch

Enable Input

K

Common Flash and PSRAM Burst Clock

WAIT

Wait Data in Burst Mode for both Flash

memories and PSRAM

Flash 1 Power Supply

Flash 2 Power Supply

Common Flash Supply for I/O Buffers

Common Flash Optional Supply Voltage

for Fast Program & Erase

Common, Ground

PSRAM Power Supply

NC

Not Connected Internally

DU

Do Not Use as Internally Connected

Flash Memory Signals

Flash 1 Chip Enable Input

Flash 1 Output Enable Input

Flash 2 Chip Enable Input

Flash 2 Output Enable Input

Common Flash Memory Write Enable

Input

Common Flash Memory Reset input

Common Flash Memory Write Protect

Input

PSRAM Signals

Chip Enable Input

Output Enable Input

Write Enable Input

Configuration Register Enable Input

Upper Byte Enable Input

Lower Byte Enable Input